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author | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2010-09-23 15:18:19 +0000 |
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committer | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2010-09-23 15:18:19 +0000 |
commit | 60e5ef9f190902591c6228d470a85fd82994f2c4 (patch) | |
tree | e33a15037da877a8c0a8d86f0fc6bc00bd4a08e2 /opcodes/arm-dis.c | |
parent | 691338631685cad7a3b8d8e330df408c999e423a (diff) | |
download | gdb-60e5ef9f190902591c6228d470a85fd82994f2c4.zip gdb-60e5ef9f190902591c6228d470a85fd82994f2c4.tar.gz gdb-60e5ef9f190902591c6228d470a85fd82994f2c4.tar.bz2 |
* gas/config/tc-arm.c (arm_ext_mp): Add.
(do_pld): Update comment.
(insns): Add support for pldw.
(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
MP extension.
(arm_extensions): Add 'mp' extension.
(aeabi_set_public_attributes): Emit correct build attribute when
MP extension is enabled.
* gas/doc/c-arm.texi: Update for MP extensions.
* gas/testsuite/gas/arm/arch7a-mp.d: Add.
* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* include/opcode/arm.h (ARM_EXT_MP): Add.
(ARM_ARCH_V7A_MP): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
(thumb32_opcodes): Likewise.
Diffstat (limited to 'opcodes/arm-dis.c')
-rw-r--r-- | opcodes/arm-dis.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 831b26c..306023d 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -829,6 +829,9 @@ static const struct opcode32 arm_opcodes[] = {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"}, {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"}, + /* MP Extension instructions. */ + {ARM_EXT_MP, 0xf410f000, 0xfc70f000, "pldw\t%a"}, + /* V7 instructions. */ {ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"}, {ARM_EXT_V7, 0x0320f0f0, 0x0ffffff0, "dbg%c\t#%0-3d"}, @@ -1353,6 +1356,9 @@ static const struct opcode32 thumb32_opcodes[] = {ARM_EXT_DIV, 0xfb90f0f0, 0xfff0f0f0, "sdiv%c\t%8-11r, %16-19r, %0-3r"}, {ARM_EXT_DIV, 0xfbb0f0f0, 0xfff0f0f0, "udiv%c\t%8-11r, %16-19r, %0-3r"}, + /* MP Extension instructions. */ + {ARM_EXT_MP, 0xf830f000, 0xff70f000, "pldw%c\t%a"}, + /* Instructions defined in the basic V6T2 set. */ {ARM_EXT_V6T2, 0xf3af8000, 0xffffffff, "nop%c.w"}, {ARM_EXT_V6T2, 0xf3af8001, 0xffffffff, "yield%c.w"}, |