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author | Julian Brown <julian@codesourcery.com> | 2006-07-05 17:08:47 +0000 |
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committer | Julian Brown <julian@codesourcery.com> | 2006-07-05 17:08:47 +0000 |
commit | e8b42ce4f8a8c3f8f67ed0d040f95aa982fcf2ee (patch) | |
tree | 2828bd77e1537fea9dc8d3bd38fcdf68107ea9d5 /opcodes/arm-dis.c | |
parent | c5cfaa43afd6da46044344d3d88e74a2110c996e (diff) | |
download | gdb-e8b42ce4f8a8c3f8f67ed0d040f95aa982fcf2ee.zip gdb-e8b42ce4f8a8c3f8f67ed0d040f95aa982fcf2ee.tar.gz gdb-e8b42ce4f8a8c3f8f67ed0d040f95aa982fcf2ee.tar.bz2 |
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
Diffstat (limited to 'opcodes/arm-dis.c')
-rw-r--r-- | opcodes/arm-dis.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 977fcf1..a375578 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -280,7 +280,7 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"}, {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"}, - {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%12-15r, %16-19r, %y4"}, + {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"}, {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "fmacs%c\t%y1, %y2, %y0"}, |