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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2010-06-07 10:43:52 +0000
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2010-06-07 10:43:52 +0000
commit1f4e49505385a998c734d2349a201ba03d7aee65 (patch)
tree11298c7066a543fc6aef7e13e590089e9b8b963e /opcodes/arm-dis.c
parent16d6b4b7a2949c5932b2b52b518d2c1adac25180 (diff)
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* gas/testsuite/gas/arm/thumb-eabi.d: Add case for divided syntax encoding of movs.
* gas/testsuite/gas/arm/thumb.d: Likewise. * gas/testsuite/gas/arm/thumb.s: Likewise. * gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly. * gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise. * gas/testsuite/gas/arm/thumb32.d: Likewise. * ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly. * ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise. * opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
Diffstat (limited to 'opcodes/arm-dis.c')
-rw-r--r--opcodes/arm-dis.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 3763c1e..174de5a 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1249,6 +1249,7 @@ static const struct opcode16 thumb_opcodes[] =
{ARM_EXT_V4T, 0x5000, 0xFA00, "str%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
{ARM_EXT_V4T, 0x5800, 0xFA00, "ldr%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
/* format 1 */
+ {ARM_EXT_V4T, 0x0000, 0xFFC0, "mov%C\t%0-2r, %3-5r"},
{ARM_EXT_V4T, 0x0000, 0xF800, "lsl%C\t%0-2r, %3-5r, #%6-10d"},
{ARM_EXT_V4T, 0x0800, 0xF800, "lsr%C\t%0-2r, %3-5r, %s"},
{ARM_EXT_V4T, 0x1000, 0xF800, "asr%C\t%0-2r, %3-5r, %s"},