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| author | Scott Bambrough <scottb@netwinder.org> | 2000-06-26 16:50:29 +0000 |
|---|---|---|
| committer | Scott Bambrough <scottb@netwinder.org> | 2000-06-26 16:50:29 +0000 |
| commit | 7c03c75e90b0285da390f0f2b0bc10a145aaf107 (patch) | |
| tree | 0ebb0ad2099656b995fb17ce3e0e4a9800227481 /opcodes/arm-dis.c | |
| parent | 1994a7c76c7cb0c013596cc97202aa6aa7dacbb2 (diff) | |
| download | gdb-7c03c75e90b0285da390f0f2b0bc10a145aaf107.zip gdb-7c03c75e90b0285da390f0f2b0bc10a145aaf107.tar.gz gdb-7c03c75e90b0285da390f0f2b0bc10a145aaf107.tar.bz2 | |
2000-06-26 Scott Bambrough <scottb@netwinder.org>
* arm-dis.c (regnames): Add an additional register set to match
the set used by GCC. Make it the default.
Diffstat (limited to 'opcodes/arm-dis.c')
| -rw-r--r-- | opcodes/arm-dis.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index a3e7112..4c6552e 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -60,6 +60,8 @@ static arm_regname regnames[] = { { "raw" , "Select raw register names", { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}}, + { "gcc", "Select register names used by GCC", + { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }}, { "std", "Select register names used in ARM's ISA documentation", { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc" }}, { "apcs", "Select register names used in the APCS", @@ -70,7 +72,7 @@ static arm_regname regnames[] = { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }} }; -/* Default to standard register name set. */ +/* Default to GCC register name set. */ static unsigned int regname_selected = 1; #define NUM_ARM_REGNAMES NUM_ELEM (regnames) |