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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-06 16:47:56 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-12 10:08:37 +0200 |
| commit | 1c2e355e4830814e18329a53d01cfa634d576211 (patch) | |
| tree | 05fd5624a7e7e2cbc39b3637e6fb78c250f006aa /opcodes/arc-tbl.h | |
| parent | b99747aeed79ad69af8b8be4d9aa3a74200fca7d (diff) | |
| download | gdb-1c2e355e4830814e18329a53d01cfa634d576211.zip gdb-1c2e355e4830814e18329a53d01cfa634d576211.tar.gz gdb-1c2e355e4830814e18329a53d01cfa634d576211.tar.bz2 | |
Update ARC instruction data-base.
gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/noargs_a7.d: New file.
* testsuite/gas/arc/noargs_a7.s: Likewise.
* testsuite/gas/arc/noargs_hs.d: Likewise.
* testsuite/gas/arc/noargs_hs.s: Likewise.
opcode/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Add rtsc, sleep with no arguments.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diffstat (limited to 'opcodes/arc-tbl.h')
| -rw-r--r-- | opcodes/arc-tbl.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h index 30dd3a6..8751bdb 100644 --- a/opcodes/arc-tbl.h +++ b/opcodes/arc-tbl.h @@ -13794,6 +13794,9 @@ /* rtsc 0,limm 0011011000101111R111111110011010. */ { "rtsc", 0x362F7F9A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { ZA, LIMM }, { 0 }}, +/* rtsc 0011011001101111R111000000011010. */ +{ "rtsc", 0x366F701A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { 0 }, { 0 }}, + /* sat16<.f> b,c 00101bbb00101111FBBBCCCCCC000010. */ { "sat16", 0x282F0002, 0xF8FF003F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700, ARITH, NONE, { RB, RC }, { C_F }}, @@ -14625,6 +14628,9 @@ /* sleep limm 00100001001011110000111110111111. */ { "sleep", 0x212F0FBF, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { LIMM }, { 0 }}, +/* sleep 00100001011011110000uuuuuu111111. */ +{ "sleep", 0x216F003F, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { 0 }, { 0 }}, + /* sqrtacc c 00101010001011110000CCCCCC111111. */ { "sqrtacc", 0x2A2F003F, 0xFFFFF03F, ARC_OPCODE_ARCv2EM, DSP, NONE, { RC }, { 0 }}, |