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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2017-04-25 17:07:00 +0200 |
|---|---|---|
| committer | claziss <claziss@synopsys.com> | 2017-04-25 17:07:00 +0200 |
| commit | be6a24d8eabdbeef32a9d79e81307af4491fcf56 (patch) | |
| tree | 470a3b6fe7360d79d1f70cb52410ec8d23052eb6 /opcodes/arc-tbl.h | |
| parent | d581dda88162831ebbd0757312fa93681d945327 (diff) | |
| download | gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.zip gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.tar.gz gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.tar.bz2 | |
[ARC] Prefer NOP instead of MOV 0,0
NOP and MOV 0,0 are having the same encoding. As MOV mnemonic is
located before NOP in the instruction table, the disassembler prints
MOV 0,0 for NOP. Reorder the instructions such that NOP is first.
gas/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/b.d: Update test.
* testsuite/gas/arc/noargs_hs.d: Likewise.
opcode/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Reorder NOP entry to be before MOV instructions.
Diffstat (limited to 'opcodes/arc-tbl.h')
| -rw-r--r-- | opcodes/arc-tbl.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h index c7d5c34..6b8a589 100644 --- a/opcodes/arc-tbl.h +++ b/opcodes/arc-tbl.h @@ -10113,6 +10113,9 @@ /* minidl<.f><.cc> 0,limm,limm 0010111011001001F1111111100QQQQQ. */ { "minidl", 0x2EC97F80, 0xFFFF7FE0, ARC_OPCODE_ARC600, DSP, NONE, { ZA, LIMM, LIMMdup }, { C_F, C_CC }}, +/* nop 00100110010010100111000000000000. */ +{ "nop", 0x264A7000, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, + /* mov<.f> b,c 00100bbb00001010FBBBCCCCCCRRRRRR. */ { "mov", 0x200A0000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MOVE, NONE, { RB, RC }, { C_F }}, @@ -12702,9 +12705,6 @@ /* neg_s b,c 01111bbbccc10011. */ { "neg_s", 0x00007813, 0x0000F81F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RB_S, RC_S }, { 0 }}, -/* nop 00100110010010100111000000000000. */ -{ "nop", 0x264A7000, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, - /* nop_s 0111100011100000. */ { "nop_s", 0x000078E0, 0x0000FFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, |