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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-28 23:05:09 +0100 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-04-07 18:36:40 +0100 |
| commit | a42a4f8400ee232ceed5ecceb61873195984f1d9 (patch) | |
| tree | 5f158b39eca25d1464029f1a8fd3bd28d8a49670 /opcodes/arc-opc.c | |
| parent | 1328504b287b2c284419d989e0d05e7d6d3ffa59 (diff) | |
| download | gdb-a42a4f8400ee232ceed5ecceb61873195984f1d9.zip gdb-a42a4f8400ee232ceed5ecceb61873195984f1d9.tar.gz gdb-a42a4f8400ee232ceed5ecceb61873195984f1d9.tar.bz2 | |
arc/nps400: Add new instructions
Add some new control instructions to the opcodes library, and a new test
for these new instructions to the assembler. The new instructions use
an instruction flag longer than any seen before (on arc), and so the max
flag length is extended to accommodate this.
gas/ChangeLog:
* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
* testsuite/gas/arc/nps400-2.d: New file.
* testsuite/gas/arc/nps400-2.s: New file.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
* arc-opc.c (arc_flag_operands): Add new flags.
(arc_flag_classes): Add new classes.
Diffstat (limited to 'opcodes/arc-opc.c')
| -rw-r--r-- | opcodes/arc-opc.c | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 69c65fc..d667a78 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1003,6 +1003,37 @@ const struct arc_flag_operand arc_flag_operands[] = #define F_NPS_R (F_NPS_FLAG + 1) { "r", 1, 1, 15, 1 }, + +#define F_NPS_RW (F_NPS_R + 1) + { "rw", 0, 1, 7, 1 }, + +#define F_NPS_RD (F_NPS_RW + 1) + { "rd", 1, 1, 7, 1 }, + +#define F_NPS_WFT (F_NPS_RD + 1) + { "wft", 0, 0, 0, 1 }, + +#define F_NPS_IE1 (F_NPS_WFT + 1) + { "ie1", 1, 2, 8, 1 }, + +#define F_NPS_IE2 (F_NPS_IE1 + 1) + { "ie2", 2, 2, 8, 1 }, + +#define F_NPS_IE12 (F_NPS_IE2 + 1) + { "ie12", 3, 2, 8, 1 }, + +#define F_NPS_SYNC_RD (F_NPS_IE12 + 1) + { "rd", 0, 1, 6, 1 }, + +#define F_NPS_SYNC_WR (F_NPS_SYNC_RD + 1) + { "wr", 1, 1, 6, 1 }, + +#define F_NPS_HWS_OFF (F_NPS_SYNC_WR + 1) + { "off", 0, 0, 0, 1 }, + +#define F_NPS_HWS_RESTORE (F_NPS_HWS_OFF + 1) + { "restore", 0, 0, 0, 1 }, + }; const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands); @@ -1084,6 +1115,25 @@ const struct arc_flag_class arc_flag_classes[] = #define C_NPS_R (C_NPS_F + 1) { F_CLASS_OPTIONAL, { F_NPS_R, F_NULL}}, + +#define C_NPS_SCHD_RW (C_NPS_R + 1) + { F_CLASS_REQUIRED, { F_NPS_RW, F_NPS_RD, F_NULL}}, + +#define C_NPS_SCHD_TRIG (C_NPS_SCHD_RW + 1) + { F_CLASS_REQUIRED, { F_NPS_WFT, F_NULL}}, + +#define C_NPS_SCHD_IE (C_NPS_SCHD_TRIG + 1) + { F_CLASS_OPTIONAL, { F_NPS_IE1, F_NPS_IE2, F_NPS_IE12, F_NULL}}, + +#define C_NPS_SYNC (C_NPS_SCHD_IE + 1) + { F_CLASS_REQUIRED, { F_NPS_SYNC_RD, F_NPS_SYNC_WR, F_NULL}}, + +#define C_NPS_HWS_OFF (C_NPS_SYNC + 1) + { F_CLASS_REQUIRED, { F_NPS_HWS_OFF, F_NULL}}, + +#define C_NPS_HWS_RESTORE (C_NPS_HWS_OFF + 1) + { F_CLASS_REQUIRED, { F_NPS_HWS_RESTORE, F_NULL}}, + }; /* The operands table. |