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authorclaziss <claziss@synopsys.com>2017-11-21 14:03:03 +0100
committerclaziss <claziss@synopsys.com>2017-11-21 14:56:16 +0100
commit50d2740d562edc68b2fbcacc0585c3acfc2c302f (patch)
treeef2a27907868442222db7aed0750cba847f8e12f /opcodes/arc-opc.c
parentd85bf2ba86fea1cf918f065d179b98eb4ddbde86 (diff)
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[ARC] Improve printing of pc-relative instructions.
opcodes/ 2017-11-21 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (print_insn_arc): Pretty print pc-relative offsets. * arc-opc.c (SIMM21_A16_5): Make it pc-relative. gas/ 2017-11-21 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/b.d : Update test. * testsuite/gas/arc/bl.d: Likewise. * testsuite/gas/arc/jli-1.d: Likewise. * testsuite/gas/arc/lp.d: Likewise. * testsuite/gas/arc/pcl-relocs.d: Likewise. * testsuite/gas/arc/pcrel-relocs.d: Likewise. * testsuite/gas/arc/pic-relocs.d: Likewise. * testsuite/gas/arc/plt-relocs.d: Likewise. * testsuite/gas/arc/pseudos.d: Likewise. * testsuite/gas/arc/relax-avoid2.d: Likewise. * testsuite/gas/arc/relax-avoid3.d: Likewise. * testsuite/gas/arc/relax-b.d: Likewise. * testsuite/gas/arc/tls-relocs.d: Likewise. * testsuite/gas/arc/relax-add01.d: Likewise. * testsuite/gas/arc/relax-add04.d: Likewise. * testsuite/gas/arc/relax-ld01.d: Likewise. * testsuite/gas/arc/relax-sub01.d: Likewise. * testsuite/gas/arc/relax-sub02.d: Likewise. * testsuite/gas/arc/relax-sub04.d: Likewise. * testsuite/gas/arc/pcl-print.s: New file. * testsuite/gas/arc/pcl-print.d: Likewise. * testsuite/gas/arc/nps400-12.d: Likewise. ld/ 2017-11-21 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/jli-simple.d: Update test.
Diffstat (limited to 'opcodes/arc-opc.c')
-rw-r--r--opcodes/arc-opc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index e57877e..56c9aaf 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -2006,7 +2006,7 @@ const struct arc_operand arc_operands[] =
/* SIMM21_A16_5 mask = 00000111111111102222222222000000. */
#define SIMM21_A16_5 (UIMM6_8 + 1)
{21, 0, BFD_RELOC_ARC_S21H_PCREL, ARC_OPERAND_SIGNED
- | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE,
+ | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE | ARC_OPERAND_PCREL,
insert_simm21_a16_5, extract_simm21_a16_5},
/* SIMM25_A16_5 mask = 00000111111111102222222222003333. */