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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-15 22:01:34 +0000 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-21 16:44:50 +0000 |
| commit | e23e8ebee364b79556ec05075532da20b317c100 (patch) | |
| tree | 3bd8c54e74807f0087043515a4fb481f23de94e3 /opcodes/arc-nps400-tbl.h | |
| parent | 1ae8ab4714eaab3d98fd906cfd6a5fedc469643a (diff) | |
| download | gdb-e23e8ebee364b79556ec05075532da20b317c100.zip gdb-e23e8ebee364b79556ec05075532da20b317c100.tar.gz gdb-e23e8ebee364b79556ec05075532da20b317c100.tar.bz2 | |
arc/nps400: Add first nps400 instructions
Adds the first few nps400 instructions.
gas/ChangeLog:
* testsuite/gas/arc/nps400-0.d: New file.
* testsuite/gas/arc/nps400-0.s: New file.
* testsuite/gas/arc/nps400-1.d: New file.
* testsuite/gas/arc/nps400-1.s: New file.
include/ChangeLog:
* opcodes/arc.h (insn_class_t): Add BITOP type.
opcodes/ChangeLog:
* arc-nps400-tbl.h: New file.
* arc-opc.c: Add top level comment.
(insert_nps_3bit_dst): New function.
(extract_nps_3bit_dst): New function.
(insert_nps_3bit_src2): New function.
(extract_nps_3bit_src2): New function.
(insert_nps_bitop_size): New function.
(extract_nps_bitop_size): New function.
(arc_flag_operands): Add nps400 entries.
(arc_flag_classes): Add nps400 entries.
(arc_operands): Add nps400 entries.
(arc_opcodes): Add nps400 include.
Diffstat (limited to 'opcodes/arc-nps400-tbl.h')
| -rw-r--r-- | opcodes/arc-nps400-tbl.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h new file mode 100644 index 0000000..4b715f9 --- /dev/null +++ b/opcodes/arc-nps400-tbl.h @@ -0,0 +1,11 @@ +/* movl<.cl> */ +{ "movh", 0x48080000, 0xf81f0000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST, NPS_R_SRC1, NPS_UIMM16 }, { 0 }}, +{ "movh", 0x48180000, 0xf81f0000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST, NPS_UIMM16 }, { C_NPS_CL }}, + +/* movl<.cl> */ +{ "movl", 0x48090000, 0xf81f0000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST, NPS_R_SRC1, NPS_UIMM16 }, { 0 }}, +{ "movl", 0x48190000, 0xf81f0000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST, NPS_UIMM16 }, { C_NPS_CL }}, + +/* movb<.f><.cl> */ +{ "movb", 0x48010000, 0xf80f8000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST_3B, NPS_R_SRC1_3B, NPS_R_SRC2_3B, NPS_BITOP_DST_POS, NPS_BITOP_SRC_POS, NPS_BITOP_SIZE }, { C_NPS_F }}, +{ "movb", 0x48018000, 0xf80f8000, ARC_OPCODE_NPS400 , BITOP, NONE, { NPS_R_DST_3B, NPS_R_SRC2_3B, NPS_BITOP_DST_POS, NPS_BITOP_SRC_POS, NPS_BITOP_SIZE }, { C_NPS_F, C_NPS_CL }}, |