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| author | Delia Burduv <Delia.Burduv@arm.com> | 2019-10-30 13:23:35 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2019-10-30 13:23:35 +0000 |
| commit | 1820262bc909121a408e030195789a70513b9139 (patch) | |
| tree | 8e02ca27c07cf6fb65fc65c240bdef1d555449c4 /opcodes/aarch64-tbl.h | |
| parent | 864619bb2e68e4ec8fa5bcfc87b00bf6667601e3 (diff) | |
| download | gdb-1820262bc909121a408e030195789a70513b9139.zip gdb-1820262bc909121a408e030195789a70513b9139.tar.gz gdb-1820262bc909121a408e030195789a70513b9139.tar.bz2 | |
Modify the ARNM assembler to accept the omission of the immediate argument for the writeback form of the LDRAA and LDRAB mnemonics
This is a shorthand for the immediate argument being 0, as described here:
https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/ldraa-ldrab-load-register-with-pointer-authentication
This is because the instructions still have a use with an immediate
argument of 0, unlike loads without the PAC functionality. Currently,
the mnemonics are
LDRAA Xt, [Xn, #<simm10>]!
LDRAB Xt, [Xn, #<simm10>]!
After this patch they become
LDRAA Xt, [Xn {, #<simm10>}]!
LDRAB Xt, [Xn {, #<simm10>}]!
gas * config/tc-aarch64.c (parse_address_main): Accept the omission of
the immediate argument for ldraa and ldrab as a shorthand for the
immediate being 0.
* testsuite/gas/aarch64/ldraa-ldrab-no-offset.d: New test.
* testsuite/gas/aarch64/ldraa-ldrab-no-offset.s: New test.
* testsuite/gas/aarch64/illegal-ldraa.s: Modified to accept the
writeback form with no offset.
* testsuite/gas/aarch64/illegal-ldraa.s: Removed missing offset
error.
opcodes * aarch64-opc.c (print_immediate_offset_address): Don't print the
immediate for the writeback form of ldraa/ldrab if it is 0.
* aarch64-tbl.h: Updated the documentation for ADDR_SIMM10.
* aarch64-opc-2.c: Regenerated.
Diffstat (limited to 'opcodes/aarch64-tbl.h')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index ee36f1c..00168dd 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -5141,7 +5141,7 @@ struct aarch64_opcode aarch64_opcode_table[] = Y(ADDRESS, addr_simm, "ADDR_SIMM9_2", 0, F(FLD_imm9,FLD_index), \ "an address with 9-bit negative or unaligned immediate offset") \ Y(ADDRESS, addr_simm10, "ADDR_SIMM10", 0, F(FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index),\ - "an address with 10-bit scaled, signed immediate offset") \ + "an address with an optional 10-bit scaled, signed immediate offset") \ Y(ADDRESS, addr_simm, "ADDR_SIMM11", 0, F(FLD_imm7,FLD_index2),\ "an address with 11-bit signed immediate (multiple of 16) offset")\ Y(ADDRESS, addr_uimm12, "ADDR_UIMM12", 0, F(FLD_Rn,FLD_imm12), \ |