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| author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:38:59 +0100 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:02:52 +0100 |
| commit | 70d561813cd4da84109395c36662a187411a4d97 (patch) | |
| tree | 71874543aa6ff597bdc116a29af393bd33a4f8ab /opcodes/aarch64-tbl.h | |
| parent | 58bbcd02dee8ba018b97706c068ed8ed7afac15d (diff) | |
| download | gdb-70d561813cd4da84109395c36662a187411a4d97.zip gdb-70d561813cd4da84109395c36662a187411a4d97.tar.gz gdb-70d561813cd4da84109395c36662a187411a4d97.tar.bz2 | |
[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal feature macros
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
This is the first of the patch series and adds -march=armv8.5-a and
other internal feature marcos needed for it.
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_archs): New entry for armv8.5-a.
* doc/c-aarch64.texi: Add documentation for the same.
*** include/ChnageLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
(AARCH64_ARCH_V8_5): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_set aarch64_feature_v8_5): New.
(ARMV8_5, V8_5_INSN): New.
Diffstat (limited to 'opcodes/aarch64-tbl.h')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 825324e..50a9a49 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2159,6 +2159,9 @@ static const aarch64_feature_set aarch64_feature_sha3 = static const aarch64_feature_set aarch64_feature_fp_16_v8_2 = AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16_FML | AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0); +static const aarch64_feature_set aarch64_feature_v8_5 = + AARCH64_FEATURE (AARCH64_FEATURE_V8_5, 0); + #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -2186,6 +2189,7 @@ static const aarch64_feature_set aarch64_feature_fp_16_v8_2 = #define CRYPTO_V8_2 &aarch64_feature_crypto_v8_2 #define FP_F16_V8_2 &aarch64_feature_fp_16_v8_2 #define DOTPROD &aarch64_feature_dotprod +#define ARMV8_5 &aarch64_feature_v8_5 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } @@ -2237,6 +2241,8 @@ static const aarch64_feature_set aarch64_feature_fp_16_v8_2 = { NAME, OPCODE, MASK, CLASS, 0, FP_F16_V8_2, OPS, QUALS, FLAGS, 0, 0, NULL } #define DOT_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, 0, DOTPROD, OPS, QUALS, FLAGS, 0, 0, NULL } +#define V8_5_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ + { NAME, OPCODE, MASK, CLASS, 0, ARMV8_5, OPS, QUALS, FLAGS, 0, 0, NULL } struct aarch64_opcode aarch64_opcode_table[] = { |