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| author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2016-11-11 10:39:46 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2016-11-11 10:39:46 +0000 |
| commit | c84364ece4faa7b3eb0f60f4dc301282e9693e1e (patch) | |
| tree | 53e6b88adcae7cdfe7ab3da891d211a27284a369 /opcodes/aarch64-tbl.h | |
| parent | a2cfc830e715142a0dd28496feaedf569b116b0e (diff) | |
| download | gdb-c84364ece4faa7b3eb0f60f4dc301282e9693e1e.zip gdb-c84364ece4faa7b3eb0f60f4dc301282e9693e1e.tar.gz gdb-c84364ece4faa7b3eb0f60f4dc301282e9693e1e.tar.bz2 | |
[AArch64] Add ARMv8.3 PACGA instruction
Add support for the ARMv8.3 PACGA instruction.
include/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
opcodes/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64-tbl.h (arch64_opcode_table): Add pacga.
(AARCH64_OPERANDS): Add Rm_SP.
* aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_Rm_SP.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
gas/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/tc-aarch64.c (process_omitted_operand): Handle AARCH64_OPND_Rm_SP.
(parse_operands): Likewise.
* testsuite/gas/aarch64/pac.s: Add pacga.
* testsuite/gas/aarch64/pac.d: Add pacga.
Diffstat (limited to 'opcodes/aarch64-tbl.h')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 97522d6..f4c0bd1 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2694,6 +2694,7 @@ struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("asr", 0x1ac02800, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_ALIAS), CORE_INSN ("rorv", 0x1ac02c00, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_HAS_ALIAS), CORE_INSN ("ror", 0x1ac02c00, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_ALIAS), + V8_3_INSN ("pacga", 0x9ac03000, 0xffe0fc00, dp_2src, OP3 (Rd, Rn, Rm_SP), QL_I3SAMEX, 0), /* CRC instructions. */ _CRC_INSN ("crc32b", 0x1ac04000, 0xffe0fc00, dp_2src, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0), _CRC_INSN ("crc32h", 0x1ac04400, 0xffe0fc00, dp_2src, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0), @@ -3987,6 +3988,8 @@ struct aarch64_opcode aarch64_opcode_table[] = "an integer or stack pointer register") \ Y(INT_REG, regno, "Rn_SP", OPD_F_MAYBE_SP, F(FLD_Rn), \ "an integer or stack pointer register") \ + Y(INT_REG, regno, "Rm_SP", OPD_F_MAYBE_SP, F(FLD_Rm), \ + "an integer or stack pointer register") \ X(INT_REG, 0, ext_regno_pair, "PAIRREG", 0, F(), \ "the second reg of a pair") \ Y(MODIFIED_REG, reg_extended, "Rm_EXT", 0, F(), \ |