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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-11-07 16:18:51 +0000 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-11-07 16:21:17 +0000 |
| commit | 8ae2d3d9eabfd3dff6a540e7789e368e8d75fbce (patch) | |
| tree | da45daf838fb5ce64a5631f798d02583c37c7cb3 /opcodes/aarch64-tbl.h | |
| parent | e264b5b7a57dab997776ae845f9e0b3e5f20c713 (diff) | |
| download | gdb-8ae2d3d9eabfd3dff6a540e7789e368e8d75fbce.zip gdb-8ae2d3d9eabfd3dff6a540e7789e368e8d75fbce.tar.gz gdb-8ae2d3d9eabfd3dff6a540e7789e368e8d75fbce.tar.bz2 | |
[gas][aarch64] Armv8.6-a option [1/X]
Hi,
This patch is part of a series that adds support for Armv8.6-A
to binutils.
This first patch adds the Armv8.6-A flag to binutils.
No instructions are behind it at the moment.
Commited on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (armv8.6-a): New arch.
* doc/c-aarch64.texi (armv8.6-a): Document new arch.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_6): New.
(AARCH64_ARCH_V8_6): New.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h (ARMV8_6): New macro.
Is it ok for trunk?
Regards,
Mihail
Diffstat (limited to 'opcodes/aarch64-tbl.h')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 00168dd..cdebac3 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2343,6 +2343,8 @@ static const aarch64_feature_set aarch64_feature_sve2sm4 = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_SM4, 0); static const aarch64_feature_set aarch64_feature_sve2bitperm = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_BITPERM, 0); +static const aarch64_feature_set aarch64_feature_v8_6 = + AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0); #define CORE &aarch64_feature_v8 @@ -2384,6 +2386,7 @@ static const aarch64_feature_set aarch64_feature_sve2bitperm = #define SVE2_SHA3 &aarch64_feature_sve2sha3 #define SVE2_SM4 &aarch64_feature_sve2sm4 #define SVE2_BITPERM &aarch64_feature_sve2bitperm +#define ARMV8_6 &aarch64_feature_v8_6 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } |