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authorRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:13 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:13 +0100
commited429b33c1ee8d6d8f8e640e58f04ec800bc7b2a (patch)
tree9dec9ddf10c70e8d8c16f5f0820eb23eefe4a733 /opcodes/aarch64-opc.h
parent80752eb0989b85e88af7f1f4627dbed8a42dfe6d (diff)
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aarch64: Add the SME2 MLAL and MLSL instructions
The {BF,F,S,U}MLAL and {BF,F,S,U}MLSL instructions share the same encoding. They are the first instance of a ZA (as opposed to ZA tile) operand having a range of offsets. As with ZA tiles, the expected range size is encoded in the operand-specific data field.
Diffstat (limited to 'opcodes/aarch64-opc.h')
-rw-r--r--opcodes/aarch64-opc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index b008425..b925af5 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -140,9 +140,12 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_2,
FLD_imm1_8,
FLD_imm1_10,
+ FLD_imm1_15,
FLD_imm1_16,
+ FLD_imm2_0,
FLD_imm2_8,
FLD_imm2_10,
FLD_imm2_15,