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authorJan Beulich <jbeulich@suse.com>2022-10-17 08:27:32 +0200
committerJan Beulich <jbeulich@suse.com>2022-10-17 08:27:32 +0200
commit308aa8e21e1b713931651912792f075d81a75331 (patch)
tree1d21c97bb2dc72836a66e558c5484e87764950ba /opcodes/aarch64-opc.c
parent995bca23f1240fa0cf0431550be581898a664037 (diff)
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x86: properly decode EVEX.W for AVX512_4{FMAPS,VNNIW} insns
These require EVEX.W=0. Use %XS to facilitate the checking, even if for the AVX512_4VNNIW ones this is kind of an abuse (as 's' there stands for "signed", not "single"). While there also correct the 3rd operand for the AVX512_4VNNIW entries: Only the memory form is allowed (just like for AVX512_4FMAPS, where the correct type is already in use).
Diffstat (limited to 'opcodes/aarch64-opc.c')
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