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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-17 16:09:44 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-17 16:09:44 +0000 |
| commit | f5555712ba2c20a6fd30b789e497009646a4638d (patch) | |
| tree | 691b33edb086a7d1ae961993dff54b312aad5906 /opcodes/aarch64-opc.c | |
| parent | be7d37a2c35f12d7fdcc9ad65333c0a81460cd89 (diff) | |
| download | gdb-f5555712ba2c20a6fd30b789e497009646a4638d.zip gdb-f5555712ba2c20a6fd30b789e497009646a4638d.tar.gz gdb-f5555712ba2c20a6fd30b789e497009646a4638d.tar.bz2 | |
include/opcode/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
opcodes/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
* aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): For
AARCH64_MOD_LSL, move the range check on the shift amount before the
alignment check; change to call set_sft_amount_out_of_range_error
instead of set_imm_out_of_range_error.
* aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
(aarch64_opcode_table): Remove the OP enumerator from the asimdimm
8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
SIMD_IMM_SFT.
gas/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (output_operand_error_record): Change to output
the out-of-range error message as value-expected message if there is
only one single value in the expected range.
(programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
LSL #0 as a programmer-friendly feature.
gas/testsuite/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/movi.s: Add tests.
* gas/aarch64/movi.d: Update.
* gas/aarch64/programmer-friendly.s: Add comment.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 72ecf5b..4bcb9ea 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -1745,15 +1745,15 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, { case AARCH64_MOD_LSL: size = aarch64_get_qualifier_esize (opnds[0].qualifier); - if (!value_aligned_p (opnd->shifter.amount, 8)) + if (!value_in_range_p (opnd->shifter.amount, 0, (size - 1) * 8)) { - set_unaligned_error (mismatch_detail, idx, 8); + set_sft_amount_out_of_range_error (mismatch_detail, idx, 0, + (size - 1) * 8); return 0; } - if (!value_in_range_p (opnd->shifter.amount, 0, (size - 1) * 8)) + if (!value_aligned_p (opnd->shifter.amount, 8)) { - set_imm_out_of_range_error (mismatch_detail, idx, 0, - (size - 1) * 8); + set_unaligned_error (mismatch_detail, idx, 8); return 0; } break; |