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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-04 14:59:33 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-04 14:59:33 +0000 |
| commit | fb098a1efcc97442a25ec05fb705089095ca5f3f (patch) | |
| tree | 2cd062d677a1fb43f2c4b4a53e6c06907017b9af /opcodes/aarch64-opc.c | |
| parent | a32c3ff848ab6898a812e1520b30d76540731614 (diff) | |
| download | gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.zip gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.tar.gz gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.tar.bz2 | |
opcodes/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (aarch64_print_operand): Change to print
AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
in comment.
* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
OP_MOV_IMM_WIDE.
gas/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/int-insns.d: Update.
* gas/aarch64/mov.d: Update.
* gas/aarch64/reloc-insn.d: Update.
ld/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
the objdump directive.
* ld-aarch64/emit-relocs-266.d: Ditto.
* ld-aarch64/emit-relocs-268.d: Ditto.
* ld-aarch64/emit-relocs-269.d: Ditto.
* ld-aarch64/emit-relocs-270.d: Ditto.
* ld-aarch64/emit-relocs-271.d: Ditto.
* ld-aarch64/emit-relocs-272.d: Ditto.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index fdb4ceb..72ecf5b 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -1,5 +1,5 @@ /* aarch64-opc.c -- AArch64 opcode support. - Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc. + Copyright 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of the GNU opcodes library. @@ -2433,10 +2433,26 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_IMMR: case AARCH64_OPND_IMMS: case AARCH64_OPND_FBITS: - case AARCH64_OPND_IMM_MOV: snprintf (buf, size, "#%" PRIi64, opnd->imm.value); break; + case AARCH64_OPND_IMM_MOV: + switch (aarch64_get_qualifier_esize (opnds[0].qualifier)) + { + case 4: /* e.g. MOV Wd, #<imm32>. */ + { + int imm32 = opnd->imm.value; + snprintf (buf, size, "#0x%-20x\t// #%d", imm32, imm32); + } + break; + case 8: /* e.g. MOV Xd, #<imm64>. */ + snprintf (buf, size, "#0x%-20" PRIx64 "\t// #%" PRIi64, + opnd->imm.value, opnd->imm.value); + break; + default: assert (0); + } + break; + case AARCH64_OPND_FPIMM0: snprintf (buf, size, "#0.0"); break; |