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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-09 10:04:11 +0000 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-15 13:11:48 +0000 |
| commit | 5c77e72e015ec1fcdcbf78b4f2a4f245922e666f (patch) | |
| tree | 8af3e7ba06d3d5e3def75e59282c255470cec3b0 /opcodes/aarch64-opc.c | |
| parent | 51bb8593e6f533970385ca64f40a5bbfc82285da (diff) | |
| download | gdb-5c77e72e015ec1fcdcbf78b4f2a4f245922e666f.zip gdb-5c77e72e015ec1fcdcbf78b4f2a4f245922e666f.tar.gz gdb-5c77e72e015ec1fcdcbf78b4f2a4f245922e666f.tar.bz2 | |
aarch64: rcpc3: add support in general_constraint_met_p
Given the introduction of the new address operand types for rcpc3
instructions, this patch adds the necessary logic to teach
`general_constraint_met_p` how to proper handle these.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 06d7487..5b76f2c 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -2114,6 +2114,19 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, return 0; } break; + case rcpc3: + if (opnd->addr.writeback) + if ((type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB + && !opnd->addr.preind) + || (type == AARCH64_OPND_RCPC3_ADDR_POSTIND + && !opnd->addr.postind)) + { + set_syntax_error (mismatch_detail, idx, + _("unexpected address writeback")); + return 0; + } + + break; default: assert (opnd->addr.writeback == 0); break; @@ -2493,6 +2506,33 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, modifiers = 1 << AARCH64_MOD_UXTW; goto sve_zz_operand; + case AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB: + case AARCH64_OPND_RCPC3_ADDR_OPT_POSTIND: + case AARCH64_OPND_RCPC3_ADDR_PREIND_WB: + case AARCH64_OPND_RCPC3_ADDR_POSTIND: + { + int num_bytes = calc_ldst_datasize (opnds); + int abs_offset = (type == AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB + || type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB) + ? opnd->addr.offset.imm * -1 + : opnd->addr.offset.imm; + if ((int) num_bytes != abs_offset + && opnd->addr.offset.imm != 0) + { + set_other_error (mismatch_detail, idx, + _("invalid increment amount")); + return 0; + } + } + break; + + case AARCH64_OPND_RCPC3_ADDR_OFFSET: + if (!value_in_range_p (opnd->addr.offset.imm, -256, 255)) + { + set_imm_out_of_range_error (mismatch_detail, idx, -256, 255); + return 0; + } + default: break; } |