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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:19 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:19 +0100 |
| commit | 0a57e14ffa4c2900f64780375282dc5dc493e250 (patch) | |
| tree | b9c6c7bf07d52059c1d44eacaacb461caf7df28b /opcodes/aarch64-opc.c | |
| parent | c469c86473273e115b267a6f8c93c8942deb93c4 (diff) | |
| download | gdb-0a57e14ffa4c2900f64780375282dc5dc493e250.zip gdb-0a57e14ffa4c2900f64780375282dc5dc493e250.tar.gz gdb-0a57e14ffa4c2900f64780375282dc5dc493e250.tar.bz2 | |
[binutils][aarch64] New sve_size_sd2 iclass.
Define new sve_size_sd2 iclass to distinguish between the two variants
of ldnt1sb and ldnt1sh.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_sd2 iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_sd2 iclass decode.
* aarch64-opc.c (fields): Handle SVE_sz2 field.
* aarch64-opc.h (enum aarch64_field_kind): New SVE_sz2 field.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 23b1503..1f85294 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -314,6 +314,7 @@ const aarch64_field fields[] = { 10, 1 }, /* SVE_rot3: 1-bit rotation amount at bit 10. */ { 22, 1 }, /* SVE_sz: 1-bit element size select. */ { 17, 2 }, /* SVE_size: 2-bit element size, bits [18,17]. */ + { 30, 1 }, /* SVE_sz2: 1-bit element size select. */ { 16, 4 }, /* SVE_tsz: triangular size select. */ { 22, 2 }, /* SVE_tszh: triangular size select high, bits [23,22]. */ { 8, 2 }, /* SVE_tszl_8: triangular size select low, bits [9,8]. */ |