diff options
author | Sudakshina Das <sudi.das@arm.com> | 2018-11-12 12:58:26 +0000 |
---|---|---|
committer | Sudakshina Das <sudi.das@arm.com> | 2018-11-12 12:59:42 +0000 |
commit | b731bc3b1bd122872a6aff68aafba1eda64a98d1 (patch) | |
tree | 9d16181a8c68a83ed69a5a1f1d5542888aa1444b /opcodes/aarch64-opc-2.c | |
parent | 193614f2b908c2b55c188cb14c3ef78993ff85b0 (diff) | |
download | gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.zip gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.tar.gz gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.tar.bz2 |
[BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension
This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.
This patch add support to the Pointer Arithmetic instructions from
MTE. These are the following instructions added in this patch:
- SUBP <Xd>, <Xn|SP>, <Xm|SP>
- SUBPS <Xd>, <Xn|SP>, <Xm|SP>
- CMPP <Xn|SP>, <Xm|SP>
where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
where
<Xd> : Is the 64-bit destination GPR.
<Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
<Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
*** opcodes/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and cmpp.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
*** gas/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
subps and cmpp.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
Diffstat (limited to 'opcodes/aarch64-opc-2.c')
-rw-r--r-- | opcodes/aarch64-opc-2.c | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index d6ae4d9..032a9fb 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -230,48 +230,48 @@ const struct aarch64_operand aarch64_operands[] = static const unsigned op_enum_table [] = { 0, - 877, - 878, - 879, + 880, + 881, 882, - 883, - 884, 885, 886, - 880, - 881, 887, 888, - 910, - 911, - 912, + 889, + 883, + 884, + 890, + 891, + 913, + 914, 915, - 916, - 917, 918, 919, - 913, - 914, 920, 921, - 969, - 970, - 971, + 922, + 916, + 917, + 923, + 924, 972, + 973, + 974, + 975, 12, 636, 637, - 1164, - 1166, - 1168, - 976, 1167, - 1165, + 1169, + 1171, + 979, + 1170, + 1168, 318, 624, 635, 634, - 974, + 977, 631, 628, 620, @@ -281,34 +281,34 @@ static const unsigned op_enum_table [] = 630, 632, 633, - 984, + 987, 664, 667, 670, 665, 668, - 821, + 824, 178, 179, 180, 181, 516, - 755, + 758, 389, 391, 413, 415, - 1237, - 1242, - 1235, - 1234, - 1238, + 1240, 1245, - 1247, + 1238, + 1237, + 1241, 1248, - 1244, 1250, - 1249, + 1251, + 1247, + 1253, + 1252, 131, }; |