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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:11:27 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:12:34 +0000 |
| commit | 9ed608f98b2c8c483c994f884429420e74835417 (patch) | |
| tree | ab566b0fb678ec0c7694ae848aa5119e810b44be /opcodes/aarch64-opc-2.c | |
| parent | a0f7013add6b1737e9a5e5d63cdf41ab2ebca0bf (diff) | |
| download | gdb-9ed608f98b2c8c483c994f884429420e74835417.zip gdb-9ed608f98b2c8c483c994f884429420e74835417.tar.gz gdb-9ed608f98b2c8c483c994f884429420e74835417.tar.bz2 | |
[AArch64][Patch 4/5] Support HINT aliases taking operands.
The Statistical Profile Extension adds the instruction PSB CSYNC as an
alias for the HINT #17 instruction. This patch adds support for aliases
of HINT which take an operand, adding a table to store operand names and
their matching hint number as well as encoding and decoding functions
for such operands. Parsing and printing the operands are deferred to any
support added for aliases with such operands.
include/opcode/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (aarch64_hint_options): Declare.
(aarch64_opnd_info): Add field hint_option.
opcodes/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm.c (aarch64_ins_hint): New.
* aarch64-asm.h (aarch64_ins_hint): Declare.
* aarch64-dis.c (aarch64_ext_hint): New.
* aarch64-dis.h (aarch64_ext_hint): Declare.
* aarch64-opc-2.c: Regenerate.
* aarch64-opc.c (aarch64_hint_options): New.
* aarch64-tbl.h (AARCH64_OPERANDS): Fix typos.
Change-Id: I2205038fc1c47d3025d1f0bc2fbf405b5575b287
Diffstat (limited to 'opcodes/aarch64-opc-2.c')
| -rw-r--r-- | opcodes/aarch64-opc-2.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index 968e99c..ef7e0a4 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -107,11 +107,11 @@ const struct aarch64_operand aarch64_operands[] = {AARCH64_OPND_CLASS_SYSTEM, "PSTATEFIELD", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a PSTATE field name"}, {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_AT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an address translation operation specifier"}, {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_DC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a data cache maintenance operation specifier"}, - {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instructin cache maintenance operation specifier"}, + {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instruction cache maintenance operation specifier"}, {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a TBL invalidation operation specifier"}, {AARCH64_OPND_CLASS_SYSTEM, "BARRIER", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a barrier option name"}, {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_ISB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the ISB option name SY or an optional 4-bit unsigned immediate"}, - {AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an prefetch operation specifier"}, + {AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a prefetch operation specifier"}, {AARCH64_OPND_CLASS_NIL, "", 0, {0}, "DUMMY"}, }; |