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authorMatthew Wahab <matthew.wahab@arm.com>2015-12-14 17:01:56 +0000
committerMatthew Wahab <matthew.wahab@arm.com>2015-12-14 17:01:56 +0000
commit42f23f6218262ae8488caab214b7f272c6758941 (patch)
tree60a1def1cbdc22e0858d3fab9f1952c83376f0dd /opcodes/aarch64-opc-2.c
parent80776b29d60ebdcd3631604858f144a72b8bcb8e (diff)
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[AArch64][PATCH 6/14] Support FP16 Vector Indexed Element instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension to the floating point and Adv.SIMD support. This patch adds FP16 instructions to the group Vector Indexed Element, making them available when +simd+fp16 is enabled. The instructions added are: FMLA, FMLS, FMUL and FMULX. The general form for these instructions is <OP> <V>.<T>, <V>.<T>, <V>.h[<idx>] where T is 4h or 8h gas/testsuite/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/advsimd-fp16.d: Update expected output. * gas/aarch64/advsimd-fp16.s: Add tests for vector indexed element instructions. opcodes/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-tbl.h (QL_ELEMENT_FP_H): New. (aarch64_opcode_table): Add fp16 versions of fmla, fmls, fmul and fmulx to the vector indexed element group. Change-Id: Ib70cd4eaa6ea2938f84ac41f31d72644dbb0ceb4
Diffstat (limited to 'opcodes/aarch64-opc-2.c')
-rw-r--r--opcodes/aarch64-opc-2.c106
1 files changed, 53 insertions, 53 deletions
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 00fb93e..087ac09 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -122,74 +122,74 @@ const struct aarch64_operand aarch64_operands[] =
static const unsigned op_enum_table [] =
{
0,
- 802,
- 803,
- 804,
+ 806,
807,
808,
- 809,
- 810,
811,
- 805,
- 806,
812,
813,
- 835,
- 836,
- 837,
+ 814,
+ 815,
+ 809,
+ 810,
+ 816,
+ 817,
+ 839,
840,
841,
- 842,
- 843,
844,
- 838,
- 839,
845,
846,
- 889,
- 890,
- 891,
- 892,
+ 847,
+ 848,
+ 842,
+ 843,
+ 849,
+ 850,
+ 893,
+ 894,
+ 895,
+ 896,
12,
- 601,
- 602,
- 1084,
- 1086,
+ 605,
+ 606,
1088,
- 896,
- 1087,
- 1085,
- 302,
- 589,
- 600,
- 599,
- 894,
- 596,
+ 1090,
+ 1092,
+ 900,
+ 1091,
+ 1089,
+ 306,
593,
- 585,
- 584,
- 591,
- 592,
- 595,
+ 604,
+ 603,
+ 898,
+ 600,
597,
- 598,
- 904,
- 617,
- 620,
- 623,
- 618,
+ 589,
+ 588,
+ 595,
+ 596,
+ 599,
+ 601,
+ 602,
+ 908,
621,
- 746,
- 162,
- 163,
- 164,
- 165,
- 490,
- 687,
- 371,
- 373,
- 393,
- 395,
+ 624,
+ 627,
+ 622,
+ 625,
+ 750,
+ 166,
+ 167,
+ 168,
+ 169,
+ 494,
+ 691,
+ 375,
+ 377,
+ 397,
+ 399,
};
/* Given the opcode enumerator OP, return the pointer to the corresponding