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author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:45:35 +0100 |
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committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:06:52 +0100 |
commit | 13c60ad7e1211ee1dfbf6bfb5e35110a33e4eed5 (patch) | |
tree | 7069b9d866404ee4f259bcea0f4d86b107d8bf02 /opcodes/aarch64-opc-2.c | |
parent | 70d561813cd4da84109395c36662a187411a4d97 (diff) | |
download | gdb-13c60ad7e1211ee1dfbf6bfb5e35110a33e4eed5.zip gdb-13c60ad7e1211ee1dfbf6bfb5e35110a33e4eed5.tar.gz gdb-13c60ad7e1211ee1dfbf6bfb5e35110a33e4eed5.tar.bz2 |
[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This patch adds the data processing instructions that are new to
ARMv8.5-A.
1) There are 2 instructions: xaflag, axflag, that are added to
manipulate the states of the flag and are used to convert between the
Arm representation and the fcmp representation.
2) The other instructions are rounding instructions which have 8
versions based on whether the floating-point number is a
Single-Precision or Double-Precision number, whether the target
integer is a 32-bit or 64-bit integer and whether the rounding mode is
the ambient rounding mode or to zero. Each of these instruction is
available in both Scalar and Vector forms.
Since both 1) and 2) have separate identification mechanism and it is
permissible that a ARMv8.4 compliant implementation may include any
arbitrary subset of the ARMv8.5 features unless otherwise specified,
new feature bits are added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
(AARCH64_FEATURE_FRINTTS): New.
(AARCH64_ARCH_V8_5): Add both by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_flagmanip): New.
(aarch64_feature_frintts): New.
(FLAGMANIP, FRINTTS): New.
(aarch64_opcode_table): Add entries for xaflag, axflag
and frint[32,64][x,z] instructions.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-dp.s: New.
* testsuite/gas/aarch64/armv8_5-a-dp.d: New.
Diffstat (limited to 'opcodes/aarch64-opc-2.c')
-rw-r--r-- | opcodes/aarch64-opc-2.c | 138 |
1 files changed, 69 insertions, 69 deletions
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index f9bb0ed..bc738ec 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -226,85 +226,85 @@ const struct aarch64_operand aarch64_operands[] = static const unsigned op_enum_table [] = { 0, - 863, - 864, - 865, - 868, - 869, - 870, - 871, - 872, - 866, - 867, 873, 874, - 896, - 897, - 898, - 901, - 902, - 903, - 904, - 905, - 899, - 900, + 875, + 878, + 879, + 880, + 881, + 882, + 876, + 877, + 883, + 884, 906, 907, - 955, - 956, - 957, - 958, + 908, + 911, + 912, + 913, + 914, + 915, + 909, + 910, + 916, + 917, + 965, + 966, + 967, + 968, 12, - 630, - 631, - 1150, - 1152, - 1154, - 962, - 1153, - 1151, - 312, - 618, - 629, - 628, - 960, - 625, + 634, + 635, + 1160, + 1162, + 1164, + 972, + 1163, + 1161, + 316, 622, - 614, - 613, - 620, - 621, - 624, - 626, - 627, + 633, + 632, 970, - 658, - 661, - 664, - 659, + 629, + 626, + 618, + 617, + 624, + 625, + 628, + 630, + 631, + 980, 662, - 807, - 172, - 173, - 174, - 175, - 510, - 747, - 383, - 385, - 407, - 409, - 1218, - 1223, - 1216, - 1215, - 1219, - 1226, + 665, + 668, + 663, + 666, + 817, + 176, + 177, + 178, + 179, + 514, + 751, + 387, + 389, + 411, + 413, 1228, - 1229, + 1233, + 1226, 1225, - 1231, - 1230, + 1229, + 1236, + 1238, + 1239, + 1235, + 1241, + 1240, 129, }; |