[AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across Lanes instructions.

ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Adv.SIMD Across Lanes, making them available
when +simd+fp16 is enabled.

The instructions added are: FMAXNMV, FMAXV, FMINNMV and FMINV.

The general form for these instructions is
   <OP> <Hd>, <V>.<T>
   where T is 4h or 8h.

The new instructions valid make uses of the 8H and 4H that were
previously illegal. The patch adjusts a test for illegal uses of vector
types to take this into account.

gas/testsuite/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/advsimd-fp16.d: Update expected output.
	* gas/aarch64/advsimd-fp16.s: Add tests for Adv.SIMD across lanes
	instructions.
	* gas/aarch64/illegal.d: Update expected output.
	* gas/aarch64/illegal.s: Replace test for illegal use of 'h'
	specifier.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (QL_XLANES_FP_H): New.
	(aarch64_opcode_table): Add fp16 versions of fmaxnmv, fmaxv,
	fminnmv, fminv to the Adv.SIMD across lanes group.

Change-Id: Ib9a47e867f55e0272c2446eb7e16837503d2f94c

1 files changed, 53 insertions, 53 deletions

diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index a91bfdc..36e3ea3 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -122,74 +122,74 @@ const struct aarch64_operand aarch64_operands[] =
 static const unsigned op_enum_table [] =
 {
   0,
-  810,
-  811,
-  812,
+  814,
   815,
   816,
-  817,
-  818,
   819,
-  813,
-  814,
   820,
   821,
-  843,
-  844,
-  845,
+  822,
+  823,
+  817,
+  818,
+  824,
+  825,
+  847,
   848,
   849,
-  850,
-  851,
   852,
-  846,
-  847,
   853,
   854,
-  897,
-  898,
-  899,
-  900,
+  855,
+  856,
+  850,
+  851,
+  857,
+  858,
+  901,
+  902,
+  903,
+  904,
   12,
-  609,
-  610,
-  1092,
-  1094,
+  613,
+  614,
   1096,
-  904,
-  1095,
-  1093,
-  306,
-  597,
-  608,
-  607,
-  902,
-  604,
+  1098,
+  1100,
+  908,
+  1099,
+  1097,
+  310,
   601,
-  593,
-  592,
-  599,
-  600,
-  603,
+  612,
+  611,
+  906,
+  608,
   605,
-  606,
-  912,
-  625,
-  628,
-  631,
-  626,
+  597,
+  596,
+  603,
+  604,
+  607,
+  609,
+  610,
+  916,
   629,
-  754,
-  166,
-  167,
-  168,
-  169,
-  498,
-  695,
-  375,
-  377,
-  397,
-  399,
+  632,
+  635,
+  630,
+  633,
+  758,
+  170,
+  171,
+  172,
+  173,
+  502,
+  699,
+  379,
+  381,
+  401,
+  403,
 };
 
 /* Given the opcode enumerator OP, return the pointer to the corresponding