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authorMaciej W. Rozycki <macro@mips.com>2018-05-15 16:26:07 +0100
committerMaciej W. Rozycki <macro@mips.com>2018-05-15 16:26:07 +0100
commit4e6ff0e1b86f736ba20a5034509ffe9f8f05b971 (patch)
treea1f2a8718851e5053eeb365e70948fc87cdb662c /opcodes/aarch64-gen.c
parentea33cd9290063d977fb2c31ea6a8567da585ab88 (diff)
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MIPS/Linux/native: Supply $zero for the !PTRACE_GETREGS case
With native MIPS/Linux targets the $zero register is inaccessible, with its supposed context slot provided by the OS occupied by the $restart register. The PTRACE_GETREGS path takes care of it by artificially supplying the hardwired contents of $zero in `mips_supply_gregset' or `mips64_supply_gregset', as applicable, however the PTRACE_PEEKUSER fallback does not, making the register unavailable, e.g.: (gdb) info registers zero at v0 v1 a0 a1 a2 a3 R0 <unavl> 00000001 00000001 d2f1a9fc 00000000 00000000 00417158 00417150 t0 t1 t2 t3 t4 t5 t6 t7 R8 00000004 00000000 fffffff8 00000000 00000000 00000000 00000001 00000007 s0 s1 s2 s3 s4 s5 s6 s7 R16 00000000 00405e30 00000000 00500000 00000000 0052ec08 00000000 00000000 t8 t9 k0 k1 gp sp s8 ra R24 00000000 00417008 00000000 00000000 0041e220 7fff4ce0 7fff4ce0 00405d0c status lo hi badvaddr cause pc <unavl> 00441cf1 00000017 00417004 00800024 00405d10 fcsr fir restart 00800000 00f30000 00000000 (gdb) or (under certain circumstances): (gdb) stepi Register 0 is not available (gdb) This is specifically because `mips_linux_register_addr' and `mips64_linux_register_addr', both correctly return -1 for MIPS_ZERO_REGNUM, and therefore `linux_nat_trad_target::fetch_registers' faithfully marks this register as unavailable. Supply this register artificially then in the PTRACE_PEEKUSER case as well, correcting this issue. gdb/ * mips-linux-nat.c (mips_linux_nat_target::fetch_registers): Supply the MIPS_ZERO_REGNUM register.
Diffstat (limited to 'opcodes/aarch64-gen.c')
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