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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:11:27 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:12:34 +0000 |
| commit | 9ed608f98b2c8c483c994f884429420e74835417 (patch) | |
| tree | ab566b0fb678ec0c7694ae848aa5119e810b44be /opcodes/aarch64-dis.c | |
| parent | a0f7013add6b1737e9a5e5d63cdf41ab2ebca0bf (diff) | |
| download | gdb-9ed608f98b2c8c483c994f884429420e74835417.zip gdb-9ed608f98b2c8c483c994f884429420e74835417.tar.gz gdb-9ed608f98b2c8c483c994f884429420e74835417.tar.bz2 | |
[AArch64][Patch 4/5] Support HINT aliases taking operands.
The Statistical Profile Extension adds the instruction PSB CSYNC as an
alias for the HINT #17 instruction. This patch adds support for aliases
of HINT which take an operand, adding a table to store operand names and
their matching hint number as well as encoding and decoding functions
for such operands. Parsing and printing the operands are deferred to any
support added for aliases with such operands.
include/opcode/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (aarch64_hint_options): Declare.
(aarch64_opnd_info): Add field hint_option.
opcodes/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm.c (aarch64_ins_hint): New.
* aarch64-asm.h (aarch64_ins_hint): Declare.
* aarch64-dis.c (aarch64_ext_hint): New.
* aarch64-dis.h (aarch64_ext_hint): Declare.
* aarch64-opc-2.c: Regenerate.
* aarch64-opc.c (aarch64_hint_options): New.
* aarch64-tbl.h (AARCH64_OPERANDS): Fix typos.
Change-Id: I2205038fc1c47d3025d1f0bc2fbf405b5575b287
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 631f076..6763c36 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -1067,6 +1067,33 @@ aarch64_ext_prfop (const aarch64_operand *self ATTRIBUTE_UNUSED, return 1; } +/* Decode the hint number for an alias taking an operand. Set info->hint_option + to the matching name/value pair in aarch64_hint_options. */ + +int +aarch64_ext_hint (const aarch64_operand *self ATTRIBUTE_UNUSED, + aarch64_opnd_info *info, + aarch64_insn code, + const aarch64_inst *inst ATTRIBUTE_UNUSED) +{ + /* CRm:op2. */ + unsigned hint_number; + int i; + + hint_number = extract_fields (code, 0, 2, FLD_CRm, FLD_op2); + + for (i = 0; aarch64_hint_options[i].name != NULL; i++) + { + if (hint_number == aarch64_hint_options[i].value) + { + info->hint_option = &(aarch64_hint_options[i]); + return 1; + } + } + + return 0; +} + /* Decode the extended register operand for e.g. STR <Qt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */ int |