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authorTamar Christina <tamar.christina@arm.com>2017-06-28 11:09:01 +0100
committerJiong Wang <jiong.wang@arm.com>2017-06-28 11:09:01 +0100
commit65a55fbbd949868f7df3c65d39eb8d4455515132 (patch)
tree004ff233f1a34016efc97cef4bf89a5e0003033b /opcodes/aarch64-dis.c
parentc604a79ad4d47070bbcc0bc082188fb16892ceef (diff)
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[AArch64] Add dot product support for AArch64 to binutils
gas/ * config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B. (aarch64_features): Added dotprod. * doc/c-aarch64.texi: Added dotprod. * testsuite/gas/aarch64/dotproduct.d: New. * testsuite/gas/aarch64/dotproduct.s: New. opcodes/ * aarch64-asm.c (aarch64_ins_reglane): Added 4B dotprod. * aarch64-dis.c (aarch64_ext_reglane): Likewise. * aarch64-tbl.h (QL_V3DOT, QL_V2DOT): New. (aarch64_feature_dotprod, DOT_INSN): New. (udot, sdot): New. * aarch64-dis-2.c: Regenerated. include/ * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New. (aarch64_insn_class): Added dotprod.
Diffstat (limited to 'opcodes/aarch64-dis.c')
-rw-r--r--opcodes/aarch64-dis.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index a860dbc..4fd94e8 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -325,6 +325,21 @@ aarch64_ext_reglane (const aarch64_operand *self, aarch64_opnd_info *info,
info->reglane.index = (unsigned) (value >> 1);
}
}
+ else if (inst->opcode->iclass == dotproduct)
+ {
+ /* Need information in other operand(s) to help decoding. */
+ info->qualifier = get_expected_qualifier (inst, info->idx);
+ switch (info->qualifier)
+ {
+ case AARCH64_OPND_QLF_S_B:
+ /* L:H */
+ info->reglane.index = extract_fields (code, 0, 2, FLD_H, FLD_L);
+ info->reglane.regno &= 0x1f;
+ break;
+ default:
+ return 0;
+ }
+ }
else
{
/* Index only for e.g. SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]