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author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:07:51 +0000 |
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committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:08:12 +0000 |
commit | 5f7728b7413b3bed576f8dd11d1343c20b3a2333 (patch) | |
tree | 6ffd98797d79b0004da8026b756d73fe1832aa84 /opcodes/aarch64-dis.c | |
parent | 42f23f6218262ae8488caab214b7f272c6758941 (diff) | |
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[AArch64][PATCH 7/14] Support FP16 Scalar Indexed Element instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Scalar Indexed Element, making them available
when +simd+fp16 is enabled.
The instructions added are: FMLA, FMLS, FMUL and FMULX.
The general form for these instructions is
<OP> <Hd>, <Hs>, <V>.h[<idx>]
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for scalar indexed element
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of fmla,
fmls, fmul and fmulx to the scalar indexed element group.
Change-Id: I6a4ee20a9ae1019b89d0fd05da55222f267c5627
Diffstat (limited to 'opcodes/aarch64-dis.c')
0 files changed, 0 insertions, 0 deletions