diff options
author | Richard Sandiford <richard.sandiford@arm.com> | 2016-08-15 12:00:49 +0100 |
---|---|---|
committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-08-23 09:41:05 +0100 |
commit | 2e2bd2dfc23a1dc11e3074ea9c1b19977eb8ef42 (patch) | |
tree | a2251b2e5c1335334cd7b8af6d536b837596cd15 /opcodes/aarch64-dis.c | |
parent | 1fdbf5977f0eac8b5b3951b28fbaf09324d04ca6 (diff) | |
download | gdb-users/ARM/sve.zip gdb-users/ARM/sve.tar.gz gdb-users/ARM/sve.tar.bz2 |
[AArch64] Add SVE condition codesusers/ARM/sve
SVE defines new names for existing NZCV conditions, to reflect the
result of instructions like PTEST. This patch adds support for these
names.
The patch also adds comments to the disassembly output to show the
alternative names of a condition code. For example:
cinv x0, x1, cc
becomes:
cinv x0, x1, cc // cc = lo, ul, last
and:
b.cc f0 <...>
becomes:
b.cc f0 <...> // b.lo, b.ul, b.last
Doing this for the SVE names follows the practice recommended by the
SVE specification and is definitely useful when reading SVE code.
If the feeling is that it's too distracting elsewhere, we could add
an option to turn it off.
include/
* opcode/aarch64.h (aarch64_cond): Bump array size to 4.
opcodes/
* aarch64-dis.c (remove_dot_suffix): New function, split out from...
(print_mnemonic_name): ...here.
(print_comment): New function.
(print_aarch64_insn): Call it.
* aarch64-opc.c (aarch64_conds): Add SVE names.
(aarch64_print_operand): Print alternative condition names in
a comment.
gas/
* config/tc-aarch64.c (opcode_lookup): Search for the end of
a condition name, rather than assuming that it will have exactly
2 characters.
(parse_operands): Likewise.
* testsuite/gas/aarch64/alias.d: Add new condition-code comments
to the expected output.
* testsuite/gas/aarch64/beq_1.d: Likewise.
* testsuite/gas/aarch64/float-fp16.d: Likewise.
* testsuite/gas/aarch64/int-insns.d: Likewise.
* testsuite/gas/aarch64/no-aliases.d: Likewise.
* testsuite/gas/aarch64/programmer-friendly.d: Likewise.
* testsuite/gas/aarch64/reloc-insn.d: Likewise.
* testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s:
New test.
Change-Id: I8b7feb02a08aa97706955cf11f59c41ab87d6b96
Diffstat (limited to 'opcodes/aarch64-dis.c')
-rw-r--r-- | opcodes/aarch64-dis.c | 49 |
1 files changed, 40 insertions, 9 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 673d6e5..82afe8b 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2787,6 +2787,22 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode, } } +/* Set NAME to a copy of INST's mnemonic with the "." suffix removed. */ + +static void +remove_dot_suffix (char *name, const aarch64_inst *inst) +{ + char *ptr; + size_t len; + + ptr = strchr (inst->opcode->name, '.'); + assert (ptr && inst->cond); + len = ptr - inst->opcode->name; + assert (len < 8); + strncpy (name, inst->opcode->name, len); + name[len] = '\0'; +} + /* Print the instruction mnemonic name. */ static void @@ -2797,21 +2813,35 @@ print_mnemonic_name (const aarch64_inst *inst, struct disassemble_info *info) /* For instructions that are truly conditionally executed, e.g. b.cond, prepare the full mnemonic name with the corresponding condition suffix. */ - char name[8], *ptr; - size_t len; - - ptr = strchr (inst->opcode->name, '.'); - assert (ptr && inst->cond); - len = ptr - inst->opcode->name; - assert (len < 8); - strncpy (name, inst->opcode->name, len); - name [len] = '\0'; + char name[8]; + + remove_dot_suffix (name, inst); (*info->fprintf_func) (info->stream, "%s.%s", name, inst->cond->names[0]); } else (*info->fprintf_func) (info->stream, "%s", inst->opcode->name); } +/* Decide whether we need to print a comment after the operands of + instruction INST. */ + +static void +print_comment (const aarch64_inst *inst, struct disassemble_info *info) +{ + if (inst->opcode->flags & F_COND) + { + char name[8]; + unsigned int i, num_conds; + + remove_dot_suffix (name, inst); + num_conds = ARRAY_SIZE (inst->cond->names); + for (i = 1; i < num_conds && inst->cond->names[i]; ++i) + (*info->fprintf_func) (info->stream, "%s %s.%s", + i == 1 ? " //" : ",", + name, inst->cond->names[i]); + } +} + /* Print the instruction according to *INST. */ static void @@ -2820,6 +2850,7 @@ print_aarch64_insn (bfd_vma pc, const aarch64_inst *inst, { print_mnemonic_name (inst, info); print_operands (pc, inst->opcode, inst->operands, info); + print_comment (inst, info); } /* Entry-point of the instruction disassembler and printer. */ |