[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.

New operand AARCH64_OPND_SVE_IMM_ROT3 handles a single bit rotate
operand encoded at bit position 10.

gas/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-aarch64.c (parse_operands): Handle new SVE_IMM_ROT3 operand.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.
	* aarch64-opc.c (operand_general_constraint_met_p): Constraint checking
	for SVE_IMM_ROT3.
	(aarch64_print_operand): Add printing for SVE_IMM_ROT3.
	(fields): Handle SVE_rot3 field.
	* aarch64-opc.h (enum aarch64_field_kind): New SVE_rot3 field.
	* aarch64-tbl.h (AARCH64_OPERANDS): Use new SVE_IMM_ROT3 operand.

1 files changed, 20 insertions, 19 deletions

diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index ee7dabc..dc37212 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -20059,7 +20059,6 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 28:
     case 29:
     case 30:
-    case 160:
     case 161:
     case 162:
     case 163:
@@ -20069,7 +20068,7 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 167:
     case 168:
     case 169:
-    case 182:
+    case 170:
     case 183:
     case 184:
     case 185:
@@ -20078,8 +20077,9 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 188:
     case 189:
     case 190:
-    case 194:
-    case 197:
+    case 191:
+    case 195:
+    case 198:
       return aarch64_ext_regno (self, info, code, inst, errors);
     case 9:
       return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -20095,7 +20095,7 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 32:
     case 33:
     case 34:
-    case 200:
+    case 201:
       return aarch64_ext_reglane (self, info, code, inst, errors);
     case 35:
       return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -20130,9 +20130,8 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 80:
     case 81:
     case 82:
-    case 157:
-    case 159:
-    case 174:
+    case 158:
+    case 160:
     case 175:
     case 176:
     case 177:
@@ -20140,7 +20139,8 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 179:
     case 180:
     case 181:
-    case 199:
+    case 182:
+    case 200:
       return aarch64_ext_imm (self, info, code, inst, errors);
     case 43:
     case 44:
@@ -20155,7 +20155,7 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 148:
       return aarch64_ext_fpimm (self, info, code, inst, errors);
     case 68:
-    case 155:
+    case 156:
       return aarch64_ext_limm (self, info, code, inst, errors);
     case 69:
       return aarch64_ext_aimm (self, info, code, inst, errors);
@@ -20169,6 +20169,7 @@ aarch64_extract_operand (const aarch64_operand *self,
       return aarch64_ext_imm_rotate2 (self, info, code, inst, errors);
     case 75:
     case 152:
+    case 154:
       return aarch64_ext_imm_rotate1 (self, info, code, inst, errors);
     case 76:
     case 77:
@@ -20270,26 +20271,26 @@ aarch64_extract_operand (const aarch64_operand *self,
       return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
     case 151:
       return aarch64_ext_sve_float_zero_one (self, info, code, inst, errors);
-    case 154:
+    case 155:
       return aarch64_ext_inv_limm (self, info, code, inst, errors);
-    case 156:
+    case 157:
       return aarch64_ext_sve_limm_mov (self, info, code, inst, errors);
-    case 158:
+    case 159:
       return aarch64_ext_sve_scale (self, info, code, inst, errors);
-    case 170:
     case 171:
-      return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
     case 172:
+      return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
     case 173:
+    case 174:
       return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
-    case 191:
     case 192:
     case 193:
+    case 194:
       return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
-    case 195:
-      return aarch64_ext_sve_index (self, info, code, inst, errors);
     case 196:
-    case 198:
+      return aarch64_ext_sve_index (self, info, code, inst, errors);
+    case 197:
+    case 199:
       return aarch64_ext_sve_reglist (self, info, code, inst, errors);
     default: assert (0); abort ();
     }