[binutils][aarch64] New SVE_ADDR_ZX operand.

Add AARCH64_OPND_SVE_ADDR_ZX operand that allows a vector of addresses
in a Zn register, offset by an Xm register.
This is used with scatter/gather SVE2 instructions.

gas/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-aarch64.c (REG_ZR): Macro specifying zero register.
	(parse_address_main): Account for new addressing mode [Zn.S, Xm].
	(parse_operands): Handle new SVE_ADDR_ZX operand.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.
	* aarch64-opc.c (operand_general_constraint_met_p): Constraint checking
	for SVE_ADDR_ZX.
	(aarch64_print_operand): Add printing for SVE_ADDR_ZX.
	* aarch64-tbl.h (AARCH64_OPERANDS): Use new SVE_ADDR_ZX operand.

1 files changed, 34 insertions, 33 deletions

diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 0ab22b1..e6952bd 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -20059,7 +20059,6 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 28:
     case 29:
     case 30:
-    case 161:
     case 162:
     case 163:
     case 164:
@@ -20069,7 +20068,7 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 168:
     case 169:
     case 170:
-    case 183:
+    case 171:
     case 184:
     case 185:
     case 186:
@@ -20078,8 +20077,9 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 189:
     case 190:
     case 191:
-    case 196:
-    case 199:
+    case 192:
+    case 197:
+    case 200:
       return aarch64_ext_regno (self, info, code, inst, errors);
     case 9:
       return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -20095,7 +20095,7 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 32:
     case 33:
     case 34:
-    case 202:
+    case 203:
       return aarch64_ext_reglane (self, info, code, inst, errors);
     case 35:
       return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -20130,9 +20130,8 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 80:
     case 81:
     case 82:
-    case 158:
-    case 160:
-    case 175:
+    case 159:
+    case 161:
     case 176:
     case 177:
     case 178:
@@ -20140,7 +20139,8 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 180:
     case 181:
     case 182:
-    case 201:
+    case 183:
+    case 202:
       return aarch64_ext_imm (self, info, code, inst, errors);
     case 43:
     case 44:
@@ -20152,10 +20152,10 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 48:
       return aarch64_ext_shll_imm (self, info, code, inst, errors);
     case 51:
-    case 148:
+    case 149:
       return aarch64_ext_fpimm (self, info, code, inst, errors);
     case 68:
-    case 156:
+    case 157:
       return aarch64_ext_limm (self, info, code, inst, errors);
     case 69:
       return aarch64_ext_aimm (self, info, code, inst, errors);
@@ -20165,11 +20165,11 @@ aarch64_extract_operand (const aarch64_operand *self,
       return aarch64_ext_fbits (self, info, code, inst, errors);
     case 73:
     case 74:
-    case 153:
+    case 154:
       return aarch64_ext_imm_rotate2 (self, info, code, inst, errors);
     case 75:
-    case 152:
-    case 154:
+    case 153:
+    case 155:
       return aarch64_ext_imm_rotate1 (self, info, code, inst, errors);
     case 76:
     case 77:
@@ -20240,8 +20240,8 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 128:
     case 129:
     case 130:
-      return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
     case 131:
+      return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
     case 132:
     case 133:
     case 134:
@@ -20249,49 +20249,50 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 136:
     case 137:
     case 138:
-      return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
     case 139:
+      return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
     case 140:
     case 141:
     case 142:
-      return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
     case 143:
-      return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
+      return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
     case 144:
-      return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
+      return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
     case 145:
-      return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
+      return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
     case 146:
-      return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+      return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
     case 147:
+      return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+    case 148:
       return aarch64_ext_sve_asimm (self, info, code, inst, errors);
-    case 149:
-      return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
     case 150:
-      return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+      return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
     case 151:
+      return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+    case 152:
       return aarch64_ext_sve_float_zero_one (self, info, code, inst, errors);
-    case 155:
+    case 156:
       return aarch64_ext_inv_limm (self, info, code, inst, errors);
-    case 157:
+    case 158:
       return aarch64_ext_sve_limm_mov (self, info, code, inst, errors);
-    case 159:
+    case 160:
       return aarch64_ext_sve_scale (self, info, code, inst, errors);
-    case 171:
     case 172:
-      return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
     case 173:
+      return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
     case 174:
+    case 175:
       return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
-    case 192:
     case 193:
     case 194:
     case 195:
+    case 196:
       return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
-    case 197:
-      return aarch64_ext_sve_index (self, info, code, inst, errors);
     case 198:
-    case 200:
+      return aarch64_ext_sve_index (self, info, code, inst, errors);
+    case 199:
+    case 201:
       return aarch64_ext_sve_reglist (self, info, code, inst, errors);
     default: assert (0); abort ();
     }