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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-30 15:43:32 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-30 15:43:32 +0000 |
| commit | e30181a58decaecae0e2544b7a489915d3bcc611 (patch) | |
| tree | 43b4e89fd44f8418df2019e39892e119cb3428ec /opcodes/aarch64-asm.c | |
| parent | f9b2d5449aa0df00eb0c2b2ca9da21d879245bad (diff) | |
| download | gdb-e30181a58decaecae0e2544b7a489915d3bcc611.zip gdb-e30181a58decaecae0e2544b7a489915d3bcc611.tar.gz gdb-e30181a58decaecae0e2544b7a489915d3bcc611.tar.bz2 | |
include/opcode/
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.
opcodes/
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
ushll2 with F_HAS_ALIAS. Add entries for sxtl, sxtl2, uxtl and uxtl2.
* aarch64-asm.c (convert_xtl_to_shll): New function.
(convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
calling convert_xtl_to_shll.
* aarch64-dis.c (convert_shll_to_xtl): New function.
(convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
calling convert_shll_to_xtl.
* aarch64-gen.c: Update copyright year.
* aarch64-asm-2.c: Re-generate.
* aarch64-dis-2.c: Re-generate.
* aarch64-opc-2.c: Re-generate.
gas/testsuite/
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/alias.s: Add new tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 4c1c521..7a92b49 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1,5 +1,5 @@ /* aarch64-asm.c -- AArch64 assembler support. - Copyright 2012 Free Software Foundation, Inc. + Copyright 2012, 2013 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of the GNU opcodes library. @@ -958,6 +958,16 @@ convert_ror_to_extr (aarch64_inst *inst) copy_operand_info (inst, 2, 1); } +/* UXTL<Q> <Vd>.<Ta>, <Vn>.<Tb> + is equivalent to: + USHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #0. */ +static void +convert_xtl_to_shll (aarch64_inst *inst) +{ + inst->operands[2].qualifier = inst->operands[1].qualifier; + inst->operands[2].imm.value = 0; +} + /* Convert LSR <Xd>, <Xn>, #<shift> to @@ -1167,6 +1177,12 @@ convert_to_real (aarch64_inst *inst, const aarch64_opcode *real) case OP_ROR_IMM: convert_ror_to_extr (inst); break; + case OP_SXTL: + case OP_SXTL2: + case OP_UXTL: + case OP_UXTL2: + convert_xtl_to_shll (inst); + break; default: break; } |