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author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
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committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
commit | 68a642838267d9971f77f9eb487d32044a499c82 (patch) | |
tree | 9687f65166a0f885332088bec9166d438007c5d3 /opcodes/aarch64-asm-2.c | |
parent | 4e50d5f863090d22db5ce0ec1e7d9e075806fd91 (diff) | |
download | gdb-68a642838267d9971f77f9eb487d32044a499c82.zip gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.gz gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.bz2 |
gas/
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
gas/testsuite/
* gas/aarch64/alias.s: Add tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/illegal.s: Add tests.
* gas/aarch64/illegal.l: Update.
include/opcode/
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
(enum aarch64_opnd): Add AARCH64_OPND_COND1.
opcodes/
* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
(convert_from_csel): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
(aarch64_print_operand): Handle AARCH64_OPND_COND1.
* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
COND for cinc, cset, cinv, csetm and cneg.
(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
* aarch64-asm-2.c: Re-generated.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
-rw-r--r-- | opcodes/aarch64-asm-2.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index 9ad9e1e..225ae2e 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -303,10 +303,10 @@ aarch64_insert_operand (const aarch64_operand *self, case 55: case 56: case 57: - case 65: case 66: case 67: case 68: + case 69: return aarch64_ins_imm (self, info, code, inst); case 37: case 38: @@ -324,33 +324,34 @@ aarch64_insert_operand (const aarch64_operand *self, case 61: return aarch64_ins_fbits (self, info, code, inst); case 63: + case 64: return aarch64_ins_cond (self, info, code, inst); - case 69: - case 75: - return aarch64_ins_addr_simple (self, info, code, inst); case 70: - return aarch64_ins_addr_regoff (self, info, code, inst); + case 76: + return aarch64_ins_addr_simple (self, info, code, inst); case 71: + return aarch64_ins_addr_regoff (self, info, code, inst); case 72: case 73: - return aarch64_ins_addr_simm (self, info, code, inst); case 74: + return aarch64_ins_addr_simm (self, info, code, inst); + case 75: return aarch64_ins_addr_uimm12 (self, info, code, inst); - case 76: - return aarch64_ins_simd_addr_post (self, info, code, inst); case 77: - return aarch64_ins_sysreg (self, info, code, inst); + return aarch64_ins_simd_addr_post (self, info, code, inst); case 78: - return aarch64_ins_pstatefield (self, info, code, inst); + return aarch64_ins_sysreg (self, info, code, inst); case 79: + return aarch64_ins_pstatefield (self, info, code, inst); case 80: case 81: case 82: - return aarch64_ins_sysins_op (self, info, code, inst); case 83: + return aarch64_ins_sysins_op (self, info, code, inst); case 84: - return aarch64_ins_barrier (self, info, code, inst); case 85: + return aarch64_ins_barrier (self, info, code, inst); + case 86: return aarch64_ins_prfop (self, info, code, inst); default: assert (0); abort (); } |