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authorRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:12 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:12 +0100
commitd8773a8a5f5614f508d9919cb7626ae0497b8141 (patch)
tree5ba56e29d3a94109568b7f1d01c7330863d007e2 /opcodes/aarch64-asm-2.c
parent503fae12992e5dbf48b4e30cea8d35f31d87effe (diff)
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aarch64: Add the SME2 MOVA instructions
SME2 defines new MOVA instructions for moving multiple registers to and from ZA. As with SME, the instructions are also available through MOV aliases. One notable feature of these instructions (and many other SME2 instructions) is that some register lists must start at a multiple of the list's size. The patch uses the general error "start register out of range" when this constraint isn't met, rather than an error specifically about multiples. This ensures that the error is consistent between these simple consecutive lists and later strided lists, for which the requirements aren't a simple multiple.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
-rw-r--r--opcodes/aarch64-asm-2.c34
1 files changed, 22 insertions, 12 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 332b3f7..daba55b 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -667,9 +667,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 214:
- case 215:
case 218:
+ case 219:
+ case 224:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -681,7 +681,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 226:
+ case 234:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -726,10 +726,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 219:
case 225:
- case 230:
- case 231:
+ case 233:
+ case 238:
+ case 239:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -889,21 +889,31 @@ aarch64_insert_operand (const aarch64_operand *self,
case 211:
case 213:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ case 214:
+ case 215:
case 216:
case 217:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 220:
+ case 222:
+ case 226:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 221:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
- case 222:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 223:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
- case 224:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 227:
case 228:
case 229:
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
+ case 230:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 231:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 232:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 235:
+ case 236:
+ case 237:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}