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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:27 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:27 +0100 |
| commit | 28ed815ad2b0cb93eede83022269d6a60b9cdf31 (patch) | |
| tree | 0edb14415647f239d12f539a8ea897a1c077e094 /opcodes/aarch64-asm-2.c | |
| parent | fd1dc4a0c1b87c1efa7e0398fd47fd1e87fa0fb4 (diff) | |
| download | gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.zip gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.tar.gz gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.tar.bz2 | |
[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.
New operand describes a shift-left immediate encoded in bits
22:20-19:18-16 where UInt(bits) - esize == shift.
This operand is useful for instructions like sshllb.
gas/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (parse_operands): Handle new SVE_SHLIMM_UNPRED_22
operand.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
operand.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
* aarch64-opc.c (operand_general_constraint_met_p): Constraint checking
for SVE_SHLIMM_UNPRED_22.
(aarch64_print_operand): Add printing for SVE_SHLIMM_UNPRED_22.
* aarch64-tbl.h (AARCH64_OPERANDS): Use new SVE_SHLIMM_UNPRED_22
operand.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
| -rw-r--r-- | opcodes/aarch64-asm-2.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index b2a101f..20472ae 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -638,7 +638,6 @@ aarch64_insert_operand (const aarch64_operand *self, case 169: case 170: case 171: - case 185: case 186: case 187: case 188: @@ -647,8 +646,9 @@ aarch64_insert_operand (const aarch64_operand *self, case 191: case 192: case 193: - case 199: - case 202: + case 194: + case 200: + case 203: return aarch64_ins_regno (self, info, code, inst, errors); case 14: return aarch64_ins_reg_extended (self, info, code, inst, errors); @@ -660,7 +660,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 32: case 33: case 34: - case 205: + case 206: return aarch64_ins_reglane (self, info, code, inst, errors); case 35: return aarch64_ins_reglist (self, info, code, inst, errors); @@ -696,7 +696,6 @@ aarch64_insert_operand (const aarch64_operand *self, case 82: case 159: case 161: - case 177: case 178: case 179: case 180: @@ -704,7 +703,8 @@ aarch64_insert_operand (const aarch64_operand *self, case 182: case 183: case 184: - case 204: + case 185: + case 205: return aarch64_ins_imm (self, info, code, inst, errors); case 43: case 44: @@ -842,21 +842,22 @@ aarch64_insert_operand (const aarch64_operand *self, return aarch64_ins_sve_scale (self, info, code, inst, errors); case 172: case 173: - return aarch64_ins_sve_shlimm (self, info, code, inst, errors); case 174: + return aarch64_ins_sve_shlimm (self, info, code, inst, errors); case 175: case 176: + case 177: return aarch64_ins_sve_shrimm (self, info, code, inst, errors); - case 194: case 195: case 196: case 197: case 198: + case 199: return aarch64_ins_sve_quad_index (self, info, code, inst, errors); - case 200: - return aarch64_ins_sve_index (self, info, code, inst, errors); case 201: - case 203: + return aarch64_ins_sve_index (self, info, code, inst, errors); + case 202: + case 204: return aarch64_ins_sve_reglist (self, info, code, inst, errors); default: assert (0); abort (); } |