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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:25:08 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:28:42 +0000 |
| commit | d685192a58d4c198633bd0e69cfe0a114576e98a (patch) | |
| tree | 8b57e30467eb5a4d74ddf557c3822dd8f1016070 /opcodes/ChangeLog | |
| parent | e19616610d7327664f99215a69cb326682742dc3 (diff) | |
| download | gdb-d685192a58d4c198633bd0e69cfe0a114576e98a.zip gdb-d685192a58d4c198633bd0e69cfe0a114576e98a.tar.gz gdb-d685192a58d4c198633bd0e69cfe0a114576e98a.tar.bz2 | |
[AArch64] Add ARMv8.2 instructions BFC and REV64.
ARMv8.2 adds two new instructions: BFC as an alias for BFM and REV64 as
an alias for REV. This patch set adds support for these to binutils,
enabled when the -march=armv8.2-a is given. It depends on the support
for an instruction being its preferred form which was added in an
earlier patch.
This patch adds the alias BFC <Rd>, #<imm>, #<width> as the preferred
form for BFM when the source is a zero register and the conditions for
using the BFI form are met (in other words, BFC is the preferred form
for BFI <Rd>, <Rs>, #<imm>, #<width> when the <Rs> is a zero register).
gas/testsuite/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/alias-2.d: New.
* gas/aarch64/alias-2.s: New.
include/opcode/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (aarch64_op): Add OP_BFC.
opcodes/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-asm.c (convert_bfc_to_bfm): New.
(convert_to_real): Add case for OP_BFC.
* aarch64-dis-2.c: Regenerate.
* aarch64-dis.c: (convert_bfm_to_bfc): New.
(convert_to_alias): Add case for OP_BFC.
* aarch64-opc-2.c: Regenerate.
* aarch64-opc.c (operand_general_constraint_met_p): Weaken assert
to allow width operand in three-operand instructions.
* aarch64-tbl.h (QL_BF1): New.
(aarch64_feature_v8_2): New.
(ARMV8_2): New.
(aarch64_opcode_table): Add "bfc".
Change-Id: I6efe318b2538ba11f0caece7c6d70957441c872b
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 62eec66..bf34f8d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,22 @@ 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. + * aarch64-asm.c (convert_bfc_to_bfm): New. + (convert_to_real): Add case for OP_BFC. + * aarch64-dis-2.c: Regenerate. + * aarch64-dis.c: (convert_bfm_to_bfc): New. + (convert_to_alias): Add case for OP_BFC. + * aarch64-opc-2.c: Regenerate. + * aarch64-opc.c (operand_general_constraint_met_p): Weaken assert + to allow width operand in three-operand instructions. + * aarch64-tbl.h (QL_BF1): New. + (aarch64_feature_v8_2): New. + (ARMV8_2): New. + (aarch64_opcode_table): Add "bfc". + +2015-11-27 Matthew Wahab <matthew.wahab@arm.com> + + * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-dis.c: Weaken assert. * aarch64-gen.c: Include the instruction in the list of its |