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author | Jan Beulich <jbeulich@novell.com> | 2018-01-10 14:53:05 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2018-01-10 14:53:05 +0100 |
commit | c9e9227878d172d93bcbef51dfc76d96f027751d (patch) | |
tree | 3a84b4a9382d86c53727fb44a3deafd2d6198f52 /opcodes/ChangeLog | |
parent | 35fd2b2bcf370837a03f077acf1222f0a7e9c4d1 (diff) | |
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x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
In commit 2645e1d079 ("x86: add support for AVX-512 VPCMP*{B,W}
pseudo-ops") I screwed up the Disp8MemShift values of the AVX512VL
variants.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r-- | opcodes/ChangeLog | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 24d1101..e6aa05c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,13 @@ +2018-01-10 Jan Beulich <jbeulich@suse.com> + + * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb, + vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub, + vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew, + vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw, + vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust + Disp8MemShift of AVX512VL forms. + * i386-tbl.h: Re-generate. + 2018-01-09 Jim Wilson <jimw@sifive.com> * riscv-dis.c (maybe_print_address): If base_reg is zero, |