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authorZack Weinberg <zackw@panix.com>2005-03-12 18:14:05 +0000
committerZack Weinberg <zackw@panix.com>2005-03-12 18:14:05 +0000
commit0a003adc41a589d208bc114c2d19383880ff7073 (patch)
tree4967564c66ae873e9611637e9186eb04d6dca0d6 /opcodes/ChangeLog
parentf1210edfba61bdddfeb4ae526b61f58d78aa7754 (diff)
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* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T. Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, and ARM_ARCH_V6ZKT2. opcodes: * arm-dis.c (arm_opcodes): Document %E and %V. Add entries for v6T2 ARM instructions: bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx. (print_insn_arm): Add support for %E and %V.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r--opcodes/ChangeLog9
1 files changed, 8 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7e3bbf5..883c7a9 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2005-03-12 Zack Weinberg <zack@codesourcery.com>
+
+ * arm-dis.c (arm_opcodes): Document %E and %V.
+ Add entries for v6T2 ARM instructions:
+ bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
+ (print_insn_arm): Add support for %E and %V.
+
2005-03-10 Jeff Baker <jbaker@qnx.com>
Alan Modra <amodra@bigpond.net.au>
@@ -5,7 +12,7 @@
(powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
(SPRG_MASK): Delete.
(XSPRG_MASK): Mask off extra bits now part of sprg field.
- (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
+ (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
mfsprg4..7 after msprg and consolidate.
2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>