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authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2020-11-03 11:55:14 +0000
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2020-11-03 11:55:14 +0000
commit3a959875ea0a017ef378fa084c6cbddee01db9d8 (patch)
tree98c34e2e3967bfe087d5834cfc8a98ca71412a00 /opcodes/ChangeLog
parent70237b84c5c994a7f588815fe56853e81293cad5 (diff)
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[PATCH] aarch64: Update missing ChangeLog for AArch64 commits
Patch with missing ChangeLog entries for GAS AArch64 files.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r--opcodes/ChangeLog54
1 files changed, 54 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 94659f4..cede929 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,28 @@
+2020-10-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch65-tbl.h (struct aarch64_opcode): New instruction WFIT.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2020-10-27 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-opc.c (aarch64_print_operand): CSR PDEC operand print-out.
+ * aarch64-tbl.h (CSRE): New CSRE feature handler.
+ (_CSRE_INSN): New CSRE instruction type.
+ (struct aarch64_opcode): New 'csre' entry for a CSRE CLI feature.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2020-10-27 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-tbl.h (struct aarch64_opcode): Add new WFET instruction encoding
+ and operand description.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
2020-10-26 Cooper Qu <cooper.qu@linux.alibaba.com>
* csky-opc.h (csky_v2_opcodes): Change plsl.u16 to plsl.16.
@@ -14,6 +39,23 @@
* i386-dis.c: Change "XV" to print "{vex}" pseudo prefix.
+2020-10-23 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-asm.c (aarch64_ins_barrier_dsb_nxs): New inserter.
+ * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter
+ ins_barrier_dsb_nx.
+ * aarch64-dis.c (aarch64_ext_barrier_dsb_nxs): New extractor.
+ * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor
+ ext_barrier_dsb_nx.
+ * aarch64-opc.c (aarch64_print_operand): New options table
+ aarch64_barrier_dsb_nxs_options.
+ * aarch64-opc.h (enum aarch64_field_kind): New field name FLD_CRm_dsb_nxs.
+ * aarch64-tbl.h (struct aarch64_opcode): Define DSB nXS barrier
+ Armv8.7-a instruction.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
2020-10-22 H.J. Lu <hongjiu.lu@intel.com>
* po/es.po: Remove the duplicated entry.
@@ -46,6 +88,10 @@
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
+2020-10-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-tbl.h (ARMV8_7): New macro.
+
2020-10-14 H.J. Lu <hongjiu.lu@intel.com>
Lili Cui <lili.cui@intel.com>
@@ -144,6 +190,14 @@
Use Prefix_0XF3 on cvtdq2pd. Use Prefix_0XF2 on cvtpd2dq.
* i386-tbl.h: Regenerated.
+2020-10-08 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-opc.c: Add BRBE system registers.
+
+2020-10-08 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * aarch64-opc.c: New CSRE system registers defined.
+
2020-10-05 Samanta Navarro <ferivoz@riseup.net>
* cgen-asm.c: Fix spelling mistakes.