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| author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 12:42:56 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 19:30:39 +0000 |
| commit | b2805ed55456cea2694d31fc8627cca17120267b (patch) | |
| tree | 1c17ecfcd8b9f8bf0efcd21c9c06c13e1eda868a /opcodes/ChangeLog | |
| parent | 3fb49709438e204177373646585a76116caf23fb (diff) | |
| download | gdb-b2805ed55456cea2694d31fc8627cca17120267b.zip gdb-b2805ed55456cea2694d31fc8627cca17120267b.tar.gz gdb-b2805ed55456cea2694d31fc8627cca17120267b.tar.bz2 | |
MIPS16: Remove "extended" BREAK/SDBBP handling
Remove special casing for the `6' operand code used for the embedded
trap code of the BREAK and the SDBBP instructions to support supposedly
extended forms of these instructions.
According to all versions of the MIPS16 ASE specifications these
instructions are not extensible [1][2][3][4][5][7][8][10][11], and as
from revision 2.50 of the MIPS16e ASE specifications it has been further
clarified what was previously implied, that non-extesiable instructions
when preceded with an EXTEND prefix must cause a Reserved Instruction
exception [5][6][9][10].
Therefore supposedly extended BREAK and SDBBP instructions do not serve
their purpose anymore as they do not cause a Bp and a Debug exception
respectively and supporting these forms in disassembly only causes
confusion.
References:
[1] "Product Description, MIPS16 Application-Specific Extension",
Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16
Instruction Set Summary", p. 5
[2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10
[3] same, Table 18. "Extendable MIPS16 Instructions", p. 24
[4] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Table 3.8 "MIPS16e Special Instructions", p. 38
[5] same, Section 3.11 "MIPS16e Extensible Instructions, p. 41
[6] same, Table 3.15 "MIPS16e Extensible Instructions", p. 41
[7] same, Table 3.24 "MIPS16e RR Encoding of the Funct Field", p. 49
[8] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Table 1.8 "MIPS16e Special Instructions", p. 39
[9] same, Section 1.11 "MIPS16e Extensible Instructions", p. 42
[10] same, Table 1.15 "MIPS16e Extensible Instructions", pp. 42-43
[11] same, Table 1.24 "MIPS16e RR Encoding of the Funct Field", p. 50
gas/
* config/tc-mips.c (match_mips16_insn): Remove the `6' operand
code special case and its associated comment.
opcodes/
* mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended
encoding support.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5166be4..cb69f64 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended + encoding support. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * mips16-opc.c (mips16_opcodes): Set NODS in `pinfo' for "extend". |