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| author | Jan Beulich <jbeulich@novell.com> | 2018-11-06 11:40:25 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-11-06 11:40:25 +0100 |
| commit | 563c7eef61a1835973b857eaa7372ec66fc91d64 (patch) | |
| tree | 9b836e6a846c1b12f06e12493b1769e8818e8219 /opcodes/ChangeLog | |
| parent | 0aaca1d90a2f9f075852b2ea5907937cca037044 (diff) | |
| download | gdb-563c7eef61a1835973b857eaa7372ec66fc91d64.zip gdb-563c7eef61a1835973b857eaa7372ec66fc91d64.tar.gz gdb-563c7eef61a1835973b857eaa7372ec66fc91d64.tar.bz2 | |
x86: allow {store} to select alternative {,}PEXTRW encoding
The 0F C5 encoding is indeed a load type one (just that memory operands
are not permitted), while the 0F 3A 15 encoding is obviously a store.
Allow the pseudo prefixes to be used to select between them.
Also move (without any change) the secondary AVX512BW templates next to
the primary one.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 639ed34..8137672 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2018-11-06 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl (pextrw, vpextrw): Add Load to 0F C5 forms. + (vpmaxub): Re-order attributes on AVX512BW flavor. + * i386-tbl.h: Re-generate. + +2018-11-06 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl (vandnp*, vandp*, vcmp*, vcvtss2sd, vorp*, vpmaxub, vmovntdqa, vmpsadbw, vphsub*): Use VexWIG instead of Vex=1 on AVX / AVX2 flavors. |