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| author | Jim Wilson <jimw@sifive.com> | 2018-09-17 11:43:08 -0700 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2018-09-17 11:43:08 -0700 |
| commit | 4e2b18982ade10897e62590896a1dec496269877 (patch) | |
| tree | 34021948541cad7ad7f094143c72118d74c4dddb /opcodes/ChangeLog | |
| parent | 461464f22632163209937ba5128d1f9f32554ea3 (diff) | |
| download | gdb-4e2b18982ade10897e62590896a1dec496269877.zip gdb-4e2b18982ade10897e62590896a1dec496269877.tar.gz gdb-4e2b18982ade10897e62590896a1dec496269877.tar.bz2 | |
RISC-V: bge[u] should get higher priority than ble[u].
2018-09-17 Kito Cheng <kito@andestech.com>
gas/
* testsuite/gas/riscv/bge.d: New.
* testsuite/gas/riscv/bge.s: Likewise.
opcodes/
* riscv-opc.c (riscv_opcodes): Adjust the order of ble and
bleu.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5d57507..19475da 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2018-09-17 Kito Cheng <kito@andestech.com> + + * riscv-opc.c (riscv_opcodes): Adjust the order of ble and bleu. + 2018-09-17 H.J. Lu <hongjiu.lu@intel.com> PR gas/23670 |