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authorSudakshina Das <sudi.das@arm.com>2018-09-26 10:54:07 +0100
committerRichard Earnshaw <Richard.Earnshaw@arm.com>2018-10-09 15:39:29 +0100
commit3fd229a447cd28a70bfd921f617bc6c3553b8fdd (patch)
tree2cd068813b2afc460cb15b8cc774eaa187374939 /opcodes/ChangeLog
parent2ac435d46608be7ef90f80aaf9ff48443aea571e (diff)
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[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
This patch is part of the patch series to add support for ARMv8.5-A extensions. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/dc-data-cache-operation-an-alias-of-sys) This patch adds the DC CVADP instruction. Since this has a separate identification mechanism a new feature bit is added. *** include/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New. *** opcodes/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * aarch64-opc.c (aarch64_sys_regs_dc): New entry for cvadp. (aarch64_sys_ins_reg_supported_p): New check for above. *** gas/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * testsuite/gas/aarch64/sysreg-4.s: Test instruction. * testsuite/gas/aarch64/sysreg-4.d: Likewise. * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
+ * aarch64-opc.c (aarch64_sys_regs_dc): New entry for cvadp.
+ (aarch64_sys_ins_reg_supported_p): New check for above.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
* aarch64-dis.c (aarch64_ext_sysins_op): Add case for
AARCH64_OPND_SYSREG_SR.
* aarch64-opc.c (aarch64_print_operand): Likewise.