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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 13:55:20 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 16:37:01 +0100 |
| commit | f08d8ce3cd39f34f26dbc681d873e59a0d7e6780 (patch) | |
| tree | 4452d13cc6f34ac8fed95aaf6bf04fb141878b8a /opcodes/ChangeLog | |
| parent | 73cd51e51b294af9591ecc2e8a28a9bec4f466b3 (diff) | |
| download | gdb-f08d8ce3cd39f34f26dbc681d873e59a0d7e6780.zip gdb-f08d8ce3cd39f34f26dbc681d873e59a0d7e6780.tar.gz gdb-f08d8ce3cd39f34f26dbc681d873e59a0d7e6780.tar.bz2 | |
[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions
opcodes/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
8, 14 and 15 for Armv8.1-M Mainline.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ad73bdf..c2f78fc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,4 +1,9 @@ 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors + 8, 14 and 15 for Armv8.1-M Mainline. + +2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Michael Collison <michael.collison@arm.com> * arm-dis.c (enum mve_instructions): New enum. |