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author | Jan Beulich <jbeulich@suse.com> | 2019-07-01 08:28:58 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2019-07-01 08:28:58 +0200 |
commit | cd546e7bd2832c882e69809fdbeb7b376b62039e (patch) | |
tree | 29f03823bd11d323762fd00d5107ac3dfb1d07e8 /opcodes/ChangeLog | |
parent | e3bba3fc751d2f8eea5a25b3f629b0d62257db86 (diff) | |
download | gdb-cd546e7bd2832c882e69809fdbeb7b376b62039e.zip gdb-cd546e7bd2832c882e69809fdbeb7b376b62039e.tar.gz gdb-cd546e7bd2832c882e69809fdbeb7b376b62039e.tar.bz2 |
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
While the ISA extensions doc suggests them to be made available just
like the SDM does for the PCLMULQDQ ISA extension, these weren't added
when supposrt for the new extension was introduced.
Also make sure the 64-bit non-AVX512 test actually tests VEX encodings,
not EVEX ones.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r-- | opcodes/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 854dd5a..a7322ae 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2019-07-01 Jan Beulich <jbeulich@suse.com> + * i386-dis-evex-prefix.h: Use PCLMUL for vpclmulqdq. + * i386-opc.tbl (vpclmullqlqdq, vpclmulhqlqdq, vpclmullqhqdq, + vpclmulhqhqdq): Add CpuVPCLMULQDQ flavors. + * i386-tbl.h: Re-generate. + +2019-07-01 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl (vextractps, vpextrw, vpinsrw): Remove Disp8MemShift from register only templates. * i386-tbl.h: Re-generate. |