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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-23 19:39:05 +0300
committerIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-23 20:05:33 +0300
commit3233d7d074e59b83f68a22071cff597f00d5ae81 (patch)
tree624dbdd63e269a8c272c8b39061c0fc8592da026 /opcodes/ChangeLog
parentb4f6242e95340a31b0519187c5fc329056ddecfd (diff)
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Enable Intel WBNOINVD instruction.
Intel has disclosed a set of new instructions for Icelake processor. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf This patch enables Intel WBNOINVD instruction. gas/ * config/tc-i386.c (cpu_arch): Add .wbnoinvd. * doc/c-i386.texi: Document .wbnoinvd. * testsuite/gas/i386/i386.exp: Add WBNOINVD tests. * testsuite/gas/i386/wbnoinvd-intel.d: New test. * testsuite/gas/i386/wbnoinvd.d: Likewise. * testsuite/gas/i386/wbnoinvd.s: Likewise. * testsuite/gas/i386/x86-64-wbnoinvd-intel.d: Likewise. * testsuite/gas/i386/x86-64-wbnoinvd.d: Likewise. * testsuite/gas/i386/x86-64-wbnoinvd.s: Likewise. opcodes/ * i386-dis.c (enum): Add PREFIX_0F09. * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS. (cpu_flags): Add CpuWBNOINVD. * i386-opc.h (enum): Add CpuWBNOINVD. (i386_cpu_flags): Add cpuwbnoinvd. * i386-opc.tbl: Add WBNOINVD instruction. * i386-init.h: Regenerate. * i386-tbl.h: Likewise.
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diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
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@@ -1,3 +1,14 @@
+2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_0F09.
+ * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
+ (cpu_flags): Add CpuWBNOINVD.
+ * i386-opc.h (enum): Add CpuWBNOINVD.
+ (i386_cpu_flags): Add cpuwbnoinvd.
+ * i386-opc.tbl: Add WBNOINVD instruction.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
2018-01-17 Jim Wilson <jimw@sifive.com>
* riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.