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| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:51:37 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:51:37 +0100 |
| commit | 72e9f31937f063ed6f5991a2b8c00068fa2dc8fc (patch) | |
| tree | e7bb2e06fa9adaaefda957bcd2b6deb5fb899b10 /opcodes/ChangeLog | |
| parent | 8a7f0c1b5ae35d041886855ac7ca9b9533e8788a (diff) | |
| download | gdb-72e9f31937f063ed6f5991a2b8c00068fa2dc8fc.zip gdb-72e9f31937f063ed6f5991a2b8c00068fa2dc8fc.tar.gz gdb-72e9f31937f063ed6f5991a2b8c00068fa2dc8fc.tar.bz2 | |
[AArch64][SVE 18/32] Tidy definition of aarch64-opc.c:int_reg
Use a macro to define 31 regular registers followed by a supplied
value for 0b11111. The SVE code will also use this for vector base
and offset registers.
opcodes/
* aarch64-opc.c (BANK): New macro.
(R32, R64): Take a register number as argument
(int_reg): Use BANK.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9a5cafb..8255182 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * aarch64-opc.c (BANK): New macro. + (R32, R64): Take a register number as argument + (int_reg): Use BANK. + +2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * aarch64-opc.c (print_register_list): Add a prefix parameter. (aarch64_print_operand): Update accordingly. |