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| author | Renlin Li <renlin.li@arm.com> | 2015-04-15 17:44:03 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-04-15 17:44:03 +0100 |
| commit | f0fba320ab5effaff5255b5526a37f0987637e3e (patch) | |
| tree | e4ab43f2d1f1ddf54122d348fe41d343fa6b79d3 /opcodes/ChangeLog | |
| parent | 6282837972a5c7b89968319caf821fcbd2a166bb (diff) | |
| download | gdb-f0fba320ab5effaff5255b5526a37f0987637e3e.zip gdb-f0fba320ab5effaff5255b5526a37f0987637e3e.tar.gz gdb-f0fba320ab5effaff5255b5526a37f0987637e3e.tar.bz2 | |
[ARM] Disassembles SSAT and SSAT16 instructions incorrectly for Thumb-2
2015-04-15 Renlin Li <renlin.li@arm.com>
opcodes/:
* arm-dis.c (thumb32_opcodes): Define 'D' format control code,
use it for ssat and ssat16.
(print_insn_thumb32): Add handle case for 'D' control code.
gas/testsuite/:
* gas/arm/arch7em.d: Adjust required ssat and ssat16 immediate field.
* gas/arm/thumb32.d: Likewise.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 832e843..ffec856 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2015-04-15 Renlin Li <renlin.li@arm.com> + + * arm-dis.c (thumb32_opcodes): Define 'D' format control code, + use it for ssat and ssat16. + (print_insn_thumb32): Add handle case for 'D' control code. + 2015-04-06 Ilya Tocar <ilya.tocar@intel.com> H.J. Lu <hongjiu.lu@intel.com> |