X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctly

The instructions are not documented in the Intel SDM but are documented
in the AMD APM as an alias to the group 2, ModRM.reg == 4 variant.

Both AMD and Intel CPUs execute the C[0-1] and D[0-3] instructions as
expected, i.e., like the /4 aliases:

  #include <stdio.h>

  int main(void)
  {
          int a = 2;

          printf ("a before: %d\n", a);

          asm volatile(".byte 0xd0,0xf0"          /* SHL %al */
                       : "+a" (a));

          printf("a after : %d\n", a);

          return 0;
  }

  $ ./a.out
  a before: 2
  a after : 4

1 files changed, 4 insertions, 0 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6c18442..a076189 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-05  Borislav Petkov  <bp@suse.de>
+
+	* i386-dis.c: Enable ModRM.reg /6 aliases.
+
 2017-07-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 
         * opcodes/arm-dis.c: Support MVFR2 in disassembly