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| author | Jan Beulich <jbeulich@novell.com> | 2018-07-24 09:46:27 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-07-24 09:46:27 +0200 |
| commit | 4174bfff8a88f21659446cf631dbbbad615b4a9e (patch) | |
| tree | 8fe87c6be21df82ff9d8912422a4775f85837b06 /opcodes/ChangeLog | |
| parent | f47194a9cde616ed1c207d618d4827d1216ef650 (diff) | |
| download | gdb-4174bfff8a88f21659446cf631dbbbad615b4a9e.zip gdb-4174bfff8a88f21659446cf631dbbbad615b4a9e.tar.gz gdb-4174bfff8a88f21659446cf631dbbbad615b4a9e.tar.bz2 | |
x86-64: correct AVX512F vcvtsi2s{d,s} handling
Just like for their AVX counterparts and CVTSI2S{D,S}, a memory source
here is ambiguous and hence
- in source files should be qualified with a suitable suffix or operand
size specifier (not doing so is an error in Intel mode, and will gain
a diagnostic in AT&T mode in the future),
- in disassembly should be properly suffixed (the Intel operand size
specifiers were emitted correctly already).
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d99b85c..acd044b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2018-07-24 Jan Beulich <jbeulich@suse.com> + + * i386-dis-evex.h (evex_table): Add %LQ to vcvtsi2ss, vcvtsi2sd, + vcvtusi2ss, and vcvtusi2sd. + * i386-opc.tbl (vcvtsi2sd, vcvtusi2sd, vcvtsi2ss, vcvtusi2ss): + Convert AVX512F variants to distinct CpuNo64 and Cpu64 forms. + * i386-tbl.h: Re-generate. + 2018-07-23 Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (extract_w6): Fix extending the sign. |